M4 gpio access time is too long....

[admin]

Dear Vybrid Expert...

I am in trouble with gpio speed...

M4 system clock is 66Mhz... and I tested set/clear gpio PTB15...

I measured  the time Port on and Port off....about 200nsec or little more...

and there are nothing code between Port on and Port off...

if cache is enabled the time is little shorter...but I can't understood myself..

I gusess..time is so much needed that M4 access GPIO registers..

M4 is running on MQX...and in asm file...there are nothing code except port action code..

I think I am missing something about this condition.....

Please Help me....

[karina_valencia]

timesyssupport can you attend this case?

[admin]

Hi.... thank you for your interests....

I think that this condition is not about MQX( software)...

The aim of the test(Gpio on/off) is for knowing the speed of Port change(on and off)...

so Port change code was positioned on Interrupt service routine...

Port register was Initialized in start of code..

and I wrote Port value to the register(PDOR) directly in timer overflow interrupt service routine.

In timer overflow interrupt service routine,  the codes are below....

TIMER_Overflow_Routine

{

     PDOR = '1' ;     // it was attached LED

     for( i = 0 ; i< 20 ; i++)

     {

          PDOR = '0' ;

          PDOR = '1' ;

     }

     PDOR = '0' ;

}

The measured data was...

The One cycle On/Off time = Total rectangle wave width / 20 .

and One cycle on/off time was about 400 nsec...

so One register access time is about 200 nsec..

and I made  A5 core didn't access same register..

please ..give me your help.....

Have nice day....

[naoumgitnik]

Jiri Kotzian, RossMcLuckie, may you take a look at this case, please?

Is it somewhat similar to your internal (nonpublic) discussion here? - Re: GPIO input capture speed, specifically the last two messages in it.

Thanks, Naoum Gitnik.

[admin]

I can't see the page....because of access limite...

Please let me know How to look the page..

thanks a lot...

[RossMcLuckie · Accepted solution]

You will not be able to view this page, this is an internal Freescale only site.

However what is important here is where are you executing your code from, OCRAM, DDR, TCM or something else?

For M4, code execution should be limited to the TCM region for best efficiency, the TCM is part of the M4 platform and offers single cycle access, accessing the OCRAM, DDR or any other peripheral (including the IOMUX for GPIO operation) will incur heavy penalties due to accessing these through our bus controllers, typically 5 or 6 clock cycles are added when you go through the bus controllers.

If you have not already done so, please execute your code from TCM, and re-test, you will still need to take into account the extra cycles for the IOMUX access when writing to the pads, you can look at the assemble code instructions and determine the cycle count they should be consuming when running from the TCM and see if that better matches your expectations.

Ross

[timesyssupport]

Hi,

We do not have measurements for average GPIO access time using MQX with Vybrid. Does Freescale MQX team have any comments on this?

Thanks,

Timesys Support