No, mentioned issue does not relate to the T4240. However the T4240 has similar erratum:
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Description: During the receive data training, the DDRC may complete on a non-optimal setting.
Impact: With non-optimal training results, data corruption could be detected or initialization may fail.
Workaround: Before setting MEM_EN, ensure the following:
If operating at... Then set DEBUG_29 to a value of...
DDR-1333 0080006ah
DDR-1600 0070006fh
DDR-1867 00700076h
For this erratum DEBUG_29 is at CCSRBAR + DDR_OFFSET + f70h.
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I would recommend to start DDR debugging at minimal working data rate, 1066MT/s - 1333MT/s.
Regards,
Bulat