T1042D4RDB PCIe BAR and ATMU Outbound Relation

[burakorcun_ozka]

Hello,

I wonder that is there any relation between address written into a BAR and address written into outbound translation address register of a PCIe controller. (The registers can be found in Chapter 28, T1040 Reference Manual)

The PCIe specification says that TLP address routing is performed with using base and limit registers in a PCIe switch, these registers covers all range defined by BAR values in endpoint(s) connected to downstream ports of the switch.

We know that an effective address used by any application is changed to a physical address via MMU, then changed to an external address written in the outbound window. At this point, the address that accesses to the switch is an external address (means address in PCIe space), it may be completely different than address written into BAR of the switch.

If routing is performed according to values in BARs, how does a PCIe switch route a TLP includes an external address? What is role of address in BAR in this transaction path?

Thanks in advanced.

[burakorcun_ozka]

ufedor,

Using the external address found after the translations, the correct root port (P2P bridge) in RC is selected, then the base and the limit registers in the bridge are used to route TLP to related endpoint.

Thank you for your answer.

[ufedor · Accepted solution]

There is no direct relation between BAR and ATMU because BARs are usually used for the PCIe EP devices and ATMU for the RC device.

Please refer to the QorIQ T1040 Reference Manual, 28.12.1.5 PCI Express outbound ATMUs and 28.12.1.6 PCI Express inbound ATMUs.