How to configuring a SGMII port in T1024?

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How to configuring a SGMII port in T1024?

Contributor III

Hello, Please provide below information.

1) Do we need to configure FMAN controller(DPAA) for SGMII ports as meMAC is connected to SerDes?

2) my board using "0x06B" SerDes protocol as per "RCW[SRDS_PRTCL_S1]" definition in RCW. For the given SerDes protocol we can configure three SGMII ports. In my board one of them (sg.m3 - Lane B) is connected to external PHY. Please let me know sequence of configuration before initializing external PHY.

3) As per "Chapter 1G SGMII" in T1024RM... for all 1G SGMII ports SGMII protocol initialization should be done before initialization of trafic but how to write SGMII MDIO registers mentioned "Chapter 30.5.8".

Thanks and Regards,


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NXP Employee
NXP Employee

Assuming that software from NXP Linux SDK is used:

1) No.

2) No special configuring is needed if corresponding MAC is correctly described in the DTS.

3) The initialization is performed by the SOC itself in accordance with selected SerDes protocol.

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