Can you specify the list of the registers between SM4.RGSTCHCK and SM4.AIPS_SWCHECK?
We opened S32K3xx_REG_PROT_detail.xlsx however it looks it is somehow duplicated with the following registers, which was informed by NXP.
| Register | Category |
| Crossbar Integrity Checker (HSE_B & AES_ACCEL AXBS_Lite) ERM_1 | SR |
| Software Watchdog 3 Trigger Multiplexing Control Body Cross Triggering Unit | SR |
| eMIOS_0 eMIOS_1 eMIOS_2 | SR-AD |
| Logic Control Unit 0 Logic Control Unit 1 | SR-AD |
| System crossbar switch Crossbar Integrity Checker (System AXBS / AXBS Lite) Crossbar Integrity Checker (Peripheral AXBS-Lite) | SR |
| eDMA control & status (MP_CSR; MP_ES; MP_HRS) eDMA transfer control descriptor 0 eDMA transfer control descriptor 1 eDMA transfer control descriptor 2 eDMA transfer control descriptor 3 eDMA transfer control descriptor 4 eDMA transfer control descriptor 5 eDMA transfer control descriptor 6 eDMA transfer control descriptor 7 eDMA transfer control descriptor 8 eDMA transfer control descriptor 9 eDMA transfer control descriptor 10 eDMA transfer control descriptor 11 | SR |
| RAM controller 0 | SR |
| Flash controller Flash controller alternate | SR |
| Software Watchdog 0 | SR |
| System Timer Module 0 XRDC | SR |
| Interrupt Monitor DMA Channel Multiplexer 0 DMA Channel Multiplexer 1 Real-time clock Reset Generation Module | SR |
| 32 kHz Slow Internal RC Oscillator | SR |
| 32 kHz Slow External Crystal Oscillator | SR |
| 48 MHz Fast Internal RC Oscillator | SR |
| 8-40 MHz Fast External Crystal Oscillator Clock Generation Module Mode Entry Module | SR |
| Frequency Modulated Phase-Locked Loop Frequency Modulated Phase-Locked Loop 2 | SR |
| Power management controller | SR |
| Flash memory Flash memory alternate | SR |
| Programmable Interrupt Timer 2 Programmable Interrupt Timer 3 | SR |
| FCCU (+FOSU) MU_0_MUB JDC (JTAG Data Communication) Configuration GPR | SR |
| Self-Test Control Unit | SR |
Hello,
It is really the same registers. The AIPS allow you to gain access to the peripheral registers with the use of three AIPS busses for the S32K388. See diagram below. Essentially for the AIPS check you would just need to check the value of registers that would excercise all three AIPS busses to verify the AIPS. For the Safety register check you would need to select safety relevant, for your application, registers and verify that the values what you would expect.
Regards,
John
