S32K3 safety mechanism SM1.FCCU_DEBUG_MON

[jinjingyang]

Hello, Sir,

According to S32K3 safety manual, the S32K3 safety mechanism SM1.FCCU_DEBUG_MON is used to detect "Debug/Test mode activation during normal run". We can enable FCCU to detect this kind of failure.

Could you please explain how can this safety mechanism tell it's an expected debug mode entry or an wrong debug mode entry?
If we enable this fault detection and use a debugger to attch to the MCU, is this condition considered to be a fault? Or if we activate a self-test (STCU2) during MCU normal running, is it be treated as a fault?

[jinjingyang]

Hello, @ankur_yadav_07 ,

I tried to verify this feature by writing 1 to the MDM_AP control register bit "Cortex-M7_0 Debug Request" but not able to trigger the FCCU NCF5 fault. Coud you please have a look at the attached s32ds project? (s32ds3.4 RTD1.0.0).

step1) Initialize FCCU by calling eMcem_Init()

step2) write 1 or 0 to register bit DCMRWD5 DEBUG_ACTIVATION_ERR_EN (not sure it should be 1 or 0)
IP_DCM_GPR->DCMRWD5 &= (~DCM_GPR_DCMRWD5_DEBUG_ACTIVATION_ERR_EN_MASK);

step3) write 1 to register MDMAPCTL CM70DBGREQ bit.
IP_MDM_AP->MDMAPCTL |= MDM_AP_MDMAPCTL_CM70DBGREQ_MASK;

But the FCCU NCF5 fault doesn't happen. Could you please advise what else I should do to trigger this fault?

[ankur_yadav_07]

Hi @jinjingyang 
Greetings of the day,
Please submit a ticket in designPDM for further tracking of this issue, as per our discussion over teams now we are closing this issue.

Thanx
ANKUR YADAV

[ankur_yadav_07]

Hi Sir,
Greetings of the day

Here, below I answered your query in three different parts. Have a look and let me know if something remains unclear to you.

Ans 1.) The mechanism is to detect unintended debug mode activation. The debug mode can be entered during normal mode when safety application is running, due to a fault in the debug logic. This accidental enabling causes debug activation signals to be sent to FCCU which then reacts on this fault.

Ans 2.) Before connecting the debugger, we need to configure DCM.DCMRWD5[DEBUG_ACTIVATION_ERR_EN] as 0, to disable debug activation error monitoring, since debugger is intentionally connected to the chip. That’s why in this condition it will not be considered as a fault. for more details, refer to DEBUG_ACTIVATION_ERR_EN field in DCMRWD5 register in S32K3xx RM.

Ans 3.) If STCU2 is intentionally enabled by application software during normal mode to run BIST, then safety application should stop and take the system into safe-state. Once BIST is completed, then reset and boot happen after which safety application can be reinitialized.

If STCU is enabled unintentionally, then in this case it reports an error to FCCU NCF 5, to ensure this particular error is reported, we need to enable the "STCU_BIST_USER_CF_EN" bit in this "DCMROD5" register and to understand the fault leading to assertion of FCCU NCF 5 channel read the "STCU_BIST_USER_CF" in "DCMROD5" register

[jinjingyang]

Hello, @ankur_yadav_07 ,

I just tried this feature but cannot see the error occurred.

The IP_DCM_GPR->DCMRWD5 register DCM_GPR_DCMRWD5_DEBUG_ACTIVATION_ERR_EN_MASK bit is 1 by default after reset.

I set it to 0 in code and use Lauterbach T32 to attach to the MCU.
But I cannot see related fault flag get set.
I think DCMROD5 DEBUG_ACTIVATION_ERR bit should be set but it's still 0.
Could you please suggest the correct procedure of generating "unintended debug activation" error?

[ankur_yadav_07]

Hi Sir,
Greetings of the day

Yes you can generate this error for "unintended debug generation" by simply following a process mentioned in Reference Manual, by changing the bit 8, 9 and 10.

For more details refer the MDM_AP register section in Debug in Reference Manual (Page no. 4577), "S32Kxx Reference Manual, Rev. 4, 04/2022".

Thanks
ANKUR YADAV