issue in transferring data through SPI using DMA

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issue in transferring data through SPI using DMA

252 Views
Guna
Contributor I

Hi NXP,

We were trying to configure DMA for SPI data transfer. Our project is developed by using EBTresos (RTD 3.0.0.0) for s32k358.

I configured SPI by going through User Manual that was given with the plugin and by going through examples in NXP Forum.

Through SPI(for now) i'm trying to transfer 16 bytes of data. I configured two channels for RX and Tx in MCL module(DMA), assigned the corresponding channels in SPI module, and also configured DMAMUX in Rm module.
SPI is in AsyncMode. I use the function Spi_AsyncTransmit(sequence) to transfer the data. During testing, i'm shorting MISO and MOSI pins , so ideally i will be able to see TxBuffer(16 Bytes) data in RxBuffer(16 Bytes) after the data transfer.

But sadly only 4 bytes are transferred.

The way i see it-- DMA is configured by the SPI module. The Major loop count for more than or equal to 4 bytes is length/4 so in our case 4.
So, after writing 4 bytes of data to TX FIFO from TxBuffer and copying Data from RX FIFO to RxBuffer i.e after completing one major loop, the channels are stopped (done bit set in TCD->CH0_CSR).

1. So now, how to transfer the full data?
2.Also, i can see the Done bit set in TCD register (CH0_CSR). I assumed the bit is set only after the full data is transmitted?
3. I'm trying to do SPI data transfer using DMA without configuring interrupts. Is it fine?

 

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197 Views
Guna
Contributor I

Hi @Julián_AragónM 

I didn't quite understand ur first point. Read from RxBuffer? Data is read from Rx FIFO and written to RxBuffer right?

Anyway-- i'm not using Lpspi_Ip_AsyncTransmit() directly instead i'm using Spi_AsyncTransmit(). I stepped through the function-- i found Lpsi_Ip_AsyncTransmit() and Spi_Callback like this...

Guna_0-1719814268626.png

Guna_1-1719814330849.png

 

This all are auto generated code-- and neither i see any option to configure a spi callback function in EBT, so i have no control over this.

2. Can i know any difference will it make if I use the function Spi_SetAsyncMode(SPI_INTERRUPT_MODE); in my code. I think now POLLING mode is used by SPI to do the DMA transfer.

3. Any tips or guidelines on configuring the interrupts both SPI and DMA(Rx and TX)?

4. i would like to know any way if i can do DMA transfer without any interruppts(SPI and DMA(Rx and Tx))?

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156 Views
Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @Guna,

When SPI interrupt mode, the asynchronous mechanism is ensured by interrupt, so interrupts
related to SPI buses handled asynchronously are enabled.

You can refer to Spi_Transfer_S32K344 example from the RTD package, which uses sync and async methods to transfer 16 bits using DMA:

Julin_AragnM_0-1720031746035.png

Best regards,
Julián

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149 Views
Guna
Contributor I

Hi @Julián_AragónM 

 

I have attached DMA TCD register contents. Channel 0 is for SPI Tx and Channel 1 is for SPI Rx. if u look --BITER=CITER=0x4 and NBYTES=0x1 . This easily translates to 4 bytes not 16 bytes. All the registers are handled by SPI driver only (NXP plugin and RTD) and i have no control. What am I missing here.  

N.B: also attached LPSPI register contents, I put breakpoint after calling Spi_AsyncTransmit()and saved these logs. I put the breakpoint some few instructions after the function call, there is enough time for DMA transfer to happen and also done bit is set, even if i didn't put breakpoint and leave software in free run the transfer is just first 4 bytes instead of 16 bytes.

PS: I gone through the example project u shared in EBT. The Major difference i found was that in Global Configuration inside DMA logical Channel. U have given PRIORITY2 for Tx and PRIORITY1 for Rx , in mine both are disabled so it must be default 0.

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73 Views
Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @Guna,

My apologies for the late reply. Please look at chapter 3.3.1 DMA configuration from RTD_SPI_IM.pdf under the \doc folder from EB Tresos' plugin directory. It highlights the needed configuration.

Also, could this be a coherency problem? integration manual states that when D-CACHE is enabled, the user shall ensure that the buffers used as TCD source and destination are allocated in the NON-CACHEABLE area (by means of Spi_Memmap). Otherwise, the SPI driver has some dependencies.

Best regards,
Julián

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231 Views
Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @Guna,

1. DMA transfer should have a callback in order to read the data from the rxBuffer on each end of SPI transfer. This is set by the Lpspi_Ip_AsyncTransmit() function.

Julin_AragnM_2-1719596696604.png

2. The DONE status field indicates a major loop completion (and it is cleared by software when a channel begins execution).

3. DMATCD IRQ should still be configured in the interrupt controller. Unfortunately, there are not many examples for SPI DMA, but please take a look into this RTD 3.0.0 S32DS example for the S32K312 derivative for some pointers in configuration: Example S32K312 SPI Transmit & Receive Using DMA DS3.5 RTD300 - NXP Community.

Julin_AragnM_0-1719596608057.png

Also, as a note: the MCL Integration Manual (RTD_MCL_IM.pdf) states that the Rx and Tx buffers should be allocated in the NON-CACHEABLE area. This is due to cache coherency problems when D-CACHE is enabled.

Best regards,
Julián

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