effect of the ADC Fclk tolerance on result accuracy?

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effect of the ADC Fclk tolerance on result accuracy?

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JeorgeB
Contributor III

Hi,

 

In external ADC devices datasheet, there is a section which give some information such as conversion result accuracy with Fadc_clk relation or AVDD tolerance vs result error. but in S321xx datasheet, these information are not provided.

for example, if I use FIRC (1%) or SIRC(3%), what will be happened to ADC result accuracy?

 

Thanks.

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello

 

Unfortunately we don't have that specific parameter. In this application note you can find the ADC specs and the best practices to increase accuracy https://www.nxp.com/docs/en/application-note/AN12217.pdf

 

Let me know if this is helpful, if you have more questions do not hesitate to ask me.

Best regards,

Omar

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello

 

Unfortunately we don't have that specific parameter. In this application note you can find the ADC specs and the best practices to increase accuracy https://www.nxp.com/docs/en/application-note/AN12217.pdf

 

Let me know if this is helpful, if you have more questions do not hesitate to ask me.

Best regards,

Omar

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JeorgeB
Contributor III

what is effect of the sampling time in the input impedance?

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