Hi
when reading RM, there is 2 memory blocks which names are : Cache & FMC(flash memory controller).
FMC in each access to flash memory, read 128 bits for instruction & 64 bits for data. next time core wants data, it no longer needs wait state for reading from flash memory and data is available in FMC buffer. so it increase core access speed.
with mentioned above,
1. so what is difference between FMC & Cache in operation? (I know they are separate modules) .
2. has core write/read access on this area?
3. should we configure this module every reset?
Thanks.