Why is the S32K RAM in 2 segments in the linker file

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Why is the S32K RAM in 2 segments in the linker file

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tommy1231
Contributor II

In the default linker files the RAM is broken into 2 different segments SRAM_L and SRAM_U.  For example on the S32k144

/* SRAM_L */
m_data (RW) : ORIGIN = 0x1FFF8000, LENGTH = 0x00008000

/* SRAM_U */
m_data_2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00007000

The addressing is continuous so is it OK to combine these or is there a good reason to keep them split.  For example can I do the following?

/* SRAM */
m_data (RW) : ORIGIN = 0x1FFF8000, LENGTH = 0x0000F000

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santiago_gonzal
NXP Employee
NXP Employee

Hello,

This is due to the internal construction of the Kinetis RAM memory buses. You cannot combine them, because if a variable is allocated crossing that boundary, it will result in a hard fault.

For more information read the great blog post from Erich Styger:

Using Multiple Memory Regions with the FreeRTOS Heap | MCU on Eclipse 

Regards,

Santiago