Hi,
My Target is S32K146.
I have configured PTD3 as NMI and corresponding ISR gets hit however I seem to be stuck in it.
I've configured the PTD3 PCR as a falling edge interrupt and yet it is acting as a level interrupt.
is there a status bit somewhere that needs to be cleared somewhere?
could someone please let me know if there is such bit that needs to be cleared.
Thanks
Hi Daniel,
Seems to me that NMI is a level sensitive(triggered) signal and not an EDGE triggered.
Is that correct?
Thanks
Hi Koorosh,
Yes, it is low-level sensitive, the signal has to go up, otherwise it will trigger again.
Regards,
Daniel
Hi Koorosh,
The PCR register does not configure the NMI functionality.
Yes, it is low-active.
There is NMIPENDSET bit in ICSR core register, but it gets cleared automatically when the handler is entered.
Please refer to ARM Cortex-M4 Devices Generic User Guide
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0553a/Cihfaaha.html
Regards,
Daniel