S32K344 GMAC sends abnormal data

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S32K344 GMAC sends abnormal data

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songoku711
Contributor II

Hello,

I am bringing up automotive ethernet using my custom development board that included S32K344 and TJA1101A transceiver working in MII mode. I used example from S32K3 lwip package to bring-up, with some modification to adapt with MII interface. So far, it managed to establish link-up, but it sent abnormal data throughout communication, I mean like this captured picture, the sent data are all zeros.

songoku711_0-1715942343937.pngsongoku711_0-1715942343937.png

The strange thing is that, when I plugged in my debugger to debug, and set breakpoint at gmac transmit function (e.g. gmacif_low_level_output) and start running, then for each time the program stopped at that function, I clicked continuing to run, and I saw that the data packets sent out were correct.

songoku711_1-1715942673498.pngsongoku711_1-1715942673498.png

Also this issue only happened at transmit direction (S32K3 sent data to PC), for reception it seemed working normally, because I checked packet data in wireshark with data in memory dump and they are the same.

I attached the zipped project code, and above captured packet logs. Hope you guy can check it and help me.

Thank you in advance.

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

it could be something with cache, I think. Maybe tx data buffer is not placed in non cacheable area.
Try to disable data cache at all, so remove D_CACHE_ENABLE in preprocessor setting, if it makes difference.

BR, Petr

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songoku711
Contributor II

Hello,

Can anyone help me here?

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

it could be something with cache, I think. Maybe tx data buffer is not placed in non cacheable area.
Try to disable data cache at all, so remove D_CACHE_ENABLE in preprocessor setting, if it makes difference.

BR, Petr

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songoku711
Contributor II

Thanks, Petr.

I disabled CACHE support in Cache_Ip, also deleted macro D_CACHE_ENABLE in pre-processor setting, and it worked.

One more question, how can I place TX data buffer in non-cacheable area, so as to keep enabling cache support for future purpose?

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