S32K148 SAI - clock edge to data out

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S32K148 SAI - clock edge to data out

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jakub_mielczare
Contributor III

Hello,

In my application I am using S32K148's SAI0 as transmitter and bitclock and framesync slave. I noticed that there is about 15-20ns delay between the external bit clock edge and data being output (please see attached screenshots). Can this be descreased by some register configuration?

Best regards,

Jakub

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Jakub,

The delay is specified in the datasheet rev.11 and it seems to be within the specification.

I would recommend measuring the analog signal with an oscilloscope.

pastedImage_1.png

pastedImage_3.png

BR, Daniel

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Jakub,

The delay is specified in the datasheet rev.11 and it seems to be within the specification.

I would recommend measuring the analog signal with an oscilloscope.

pastedImage_1.png

pastedImage_3.png

BR, Daniel