S32K144 MCU seems died (not working) once CHIPCTL register accessed.

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S32K144 MCU seems died (not working) once CHIPCTL register accessed.

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uzza9
Contributor III

I got a HardFault_Handler ISR occurred and the MCU seems died as soon as the chip control register (CHIPCTL) was accessed to set the clock out.
It happened in both cases of using an external crystal oscillator or a high-speed internal reference clock (FIRC).

1. Environment
a. Windows 11
b. S32 Design Studio for ARM version 2.2
c. MCU of the target: S32K144F512M15

2. Test procedure
a. clock initialization completed successfully for both cases of using SOSC_CLK and FIRC_CLK.
b. working as expected for blinking LED operation with PORT and RTC control without(removing) handling CLOCK OUT function.

3. Problem
a. got the HardFault_Handler ISR once accessed the CHIPCTRL register, and MCU not working (exactly endless looping in startup code) ever after when executed a function to handle CLOCK OUT (pin #24 of S32K144512M15 100pin LQFP)
b. I got the same MCU problem couple of times while doing the test, and needed to replace the MCU so that my target worked again.

4. My code to access the CHIPCTRL
void CLK_clkout()
{
    // Configure SCG_CLKOUT
    // SCG->CLKOUTCNFG = 0x06000000; // Select SPLL_CLK as source of SCG_CLKOUT
    SCG->CLKOUTCNFG = 0x03000000; // CLKOUTCNFG[24..27] : Select source of SCG_CLKOUT
                                                                  // 0b0001 = SOSC_CLK
                                                                  // 0b0011 = FIRC_CLK
                                                                  // 0b0110 = SPLL_CLK

    //Configure CLKOUT source and divider
    SIM->CHIPCTL &= ~  (SIM_CHIPCTL_CLKOUTEN_MASK|SIM_CHIPCTL_CLKOUTDIV_MASK|SIM_CHIPCTL_CLKOUTSEL_MASK); //Clear the relevant fields
    SIM->CHIPCTL = SIM_CHIPCTL_CLKOUTSEL(0) //CLKOUT source is SCG_CLKOUT
| SIM_CHIPCTL_CLKOUTDIV(0) //CLKOUT is the source signal divided by 1
& ~SIM_CHIPCTL_CLKOUTEN(1); //CLKOUT signal is enabled (0b1) or disabled (0b0, 0 MHz).

}

Remarks)

Problem was occurred for any clock sources and either CLKOUT signal enabled  or disabled.


Any comment/recommendation would be appreciated.

Thank you. 

 

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Senlent
NXP TechSupport
NXP TechSupport

Hi@uzza9

When setting the CHIPCTL register, be sure to configure it in the order given in the data sheet:

Senlent_0-1717658037425.png

For your reference (From our SDK(RTM))

    SCG->CLKOUTCNFG = 0x03000000;

    uint32_t regValue;

    /* CLKOUTEN should be first cleared and then execute sequence */
    SIM->CHIPCTL &= ~SIM_CHIPCTL_CLKOUTEN_MASK;

    regValue = SIM->CHIPCTL;
    regValue &= ~( SIM_CHIPCTL_CLKOUTEN_MASK  |
                   SIM_CHIPCTL_CLKOUTDIV_MASK |
                   SIM_CHIPCTL_CLKOUTSEL_MASK );

    regValue |= SIM_CHIPCTL_CLKOUTEN(1);
    regValue |= SIM_CHIPCTL_CLKOUTSEL(0);
    regValue |= SIM_CHIPCTL_CLKOUTDIV(0);

    SIM->CHIPCTL = regValue;

 

"b. I got the same MCU problem couple of times while doing the test, and needed to replace the MCU so that my target worked again."

I reproduced your problem and I was able to restore the MCU to normal state by using the “mass erase” command

View solution in original post

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uzza9
Contributor III

Hi@Senlent,
I got the clock out issue resolved thanks to your help.
However the CHIPCTL register still has not been updated when I stopped at a breakpoint after setting the values to generate CLKOUT signal as expected.
But I verified that values in the chip control register updated correctly as attached. Considering the endianness, the CHIPCTL register value= 0x00300D80 i.e. CLKOUTEN= 1, CLOCKOUTDIV= 5, CLKOUTSEL= 8 that is correct. 
This ticket would be closed. Thank you so much again.

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uzza9
Contributor III

Hi@Senlent,

Thank you for your point to the correct way.
The  good thing is that no more MCU seems died (not working) thanks to your help.
However still CLOCKOUT not working, my observation on status of CHIPCTL register somewhat interesting while running the code you provided.
As the attached, CHIPCTL register kept 0x00300000 (i.e. No SRAML retention) even though I was going through step by step on the code.
Even the register does not change accordingly when I set CLKOUTDIV(1).

I think I should see the CLKOUT signal at the pin of the MCU once the CLKOUT code executed while system clock working.

Can you see the register changed accordingly as well as the CLKOUT signal at the pin?

Minor remark;
I tried with following code I revised according to your point as well as the code you provided. Both did not work.
void clkout()
{
// Configure SCG_CLKOUT
// SCG->CLKOUTCNFG = 0x06000000; // Select SPLL_CLK as source of SCG_CLKOUT
SCG->CLKOUTCNFG = 0x03000000; // CLKOUTCNFG[24..27] : Select source of SCG_CLKOUT
// 0b0001 = SOSC_CLK
// 0b0011 = FIRC_CLK
// 0b0110 = SPLL_CLK

uint32_t regValue;

/* CLKOUTEN should be first cleared and then execute sequence */
SIM->CHIPCTL &= ~SIM_CHIPCTL_CLKOUTEN_MASK;

regValue = SIM->CHIPCTL;
regValue &= ~( SIM_CHIPCTL_CLKOUTEN_MASK |
SIM_CHIPCTL_CLKOUTDIV_MASK |
SIM_CHIPCTL_CLKOUTSEL_MASK );

/*
regValue |= SIM_CHIPCTL_CLKOUTEN(1);
regValue |= SIM_CHIPCTL_CLKOUTSEL(0);
regValue |= SIM_CHIPCTL_CLKOUTDIV(0);

SIM->CHIPCTL = regValue;
*/

// SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTEN(1);
SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTSEL(0);
SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTDIV(0);
SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTEN(1);
}

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Senlent
NXP TechSupport
NXP TechSupport

Hi@uzza9

I made a demo for your reference and i see no problem with the code i provided before.

you should stop first then you may see the register value.

Senlent_0-1717727126751.png

test result, output clock is 1MHz.

Senlent_1-1717727165629.png

 

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223 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@uzza9

When setting the CHIPCTL register, be sure to configure it in the order given in the data sheet:

Senlent_0-1717658037425.png

For your reference (From our SDK(RTM))

    SCG->CLKOUTCNFG = 0x03000000;

    uint32_t regValue;

    /* CLKOUTEN should be first cleared and then execute sequence */
    SIM->CHIPCTL &= ~SIM_CHIPCTL_CLKOUTEN_MASK;

    regValue = SIM->CHIPCTL;
    regValue &= ~( SIM_CHIPCTL_CLKOUTEN_MASK  |
                   SIM_CHIPCTL_CLKOUTDIV_MASK |
                   SIM_CHIPCTL_CLKOUTSEL_MASK );

    regValue |= SIM_CHIPCTL_CLKOUTEN(1);
    regValue |= SIM_CHIPCTL_CLKOUTSEL(0);
    regValue |= SIM_CHIPCTL_CLKOUTDIV(0);

    SIM->CHIPCTL = regValue;

 

"b. I got the same MCU problem couple of times while doing the test, and needed to replace the MCU so that my target worked again."

I reproduced your problem and I was able to restore the MCU to normal state by using the “mass erase” command

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