S32K HardFault with IMPRECISERR

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S32K HardFault with IMPRECISERR

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Contributor V

Hello,

I'm working on a S32K148-EVB. My software uses FreeRTOS and I'm doing SPI with lpspi using DMA.

The MPU is enabled and I'm also doing CAN reception.

Randomly I get HardFault error when high load on CAN (9 CAN frame received every 15ms) bus and SPI (32 bytes every 10ms). I takes from 30s to 5min to trigger the error.

When HardFault occurs, the register status are:

HFSR->FORCED=1

CFSR->IMPRECISERR=1

I don't know how to find the root cause for my issue.

What should I check in order to identify the root cause?

thank you.

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3 Replies

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Contributor I

Hello Antoine,

I have been playing with MCUExpresso lately, I was trying to know if the heap/stack size was actually working to trigger an error in process. It failed with the stack limit but it worked with the heap.

I created a cycle that calls a malloc function to allocate memory to see what happens when  tries to reach more that heap size and I got the error that you are having. So my recommendation to you is increase the heap size (if there still some memory for do so) or free some memory allocation functions.

Hope it helps.

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NXP TechSupport
NXP TechSupport

Hello Antoine,

Please refer to this document:

Fault handling on S32K144 

The imprecise bus fault can be precise if the write buffer is disabled in the ACTLR register.

Then, the BFAR register will contain the address on the bus.

Also, you can read the PC from the stuck in the fault handler to determine the instruction. 

BR, Daniel

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Contributor V

Hello Daniel,

Thank you for your quick feedback.

After enabling the errors handler I found my HardFault is in fact a BusFault error.

I also disabled the write buffer with S32_SCB_ACTLR_DISDEFWBUF(1); to locate when the fault is happening.

My CFSR is still giving me IMPRECISERR=1.

I found my issue is triggered by the fonction LPSPI_DRV_ReadRXBuffer on instruction lpspiState->rxBuff++;.

Now I need to find out why it's happening.

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