Hi NXP team,
I am using S32K144 controller in our project.
I used the meset() with linker script global variables.
memset(&__FSLCODE_SECTION_START, 0x00, __FSLCODE_SECTION_END - __FSLCODE_SECTION_START);
but that FSL code segment (section) is not set to zero.
find the attached document for more information on memeset() problem.
Regarding the watchdog timer :
I used the code given in the reference manual for watchdog configuration
DISABLE_INTERRUPTS(); // disable global interrupt
WDOG->CNT = 0xD928C520; //unlock watchdog
while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0); //wait until registers are unlocked
WDOG->TOVAL = 256; //set timeout value
WDOG->CS = WDOG_CS_EN(1) | WDOG_CS_CLK(1) | WDOG_CS_INT(0) |
WDOG_CS_WIN(0) | WDOG_CS_UPDATE(0);
while(((WDOG->CS & WDOG_CS_RCS_MASK ) >> WDOG_CS_RCS_SHIFT) == 0); //wait until new configuration takes effect
ENABLE_INTERRUPTS(); //enable global interrupt
if(WDOG->CNT >= 125)
{
DISABLE_INTERRUPTS(); // disable global interrupt
WDOG->CNT = 0xB480A602; // refresh watchdog
ENABLE_INTERRUPTS(); //
}
in the above code , control not come out of the while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0);
Kindly help in this.
Regards,
Ambarish
Hi Raju,
//if(timeout_s > 127) return PUBLIC_STATUS_ERROR;
INT_SYS_DisableIRQGlobal();
WDOG->CNT = 0xD928C520; // Unlock WDOG
while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0);
WDOG->TOVAL =timeout_ms;//128 * timeout_s; // Timeout in max = 65535 * (1 / 1 kHz) = 65535ms
//WDOG->CS = WDOG_CS_EN(1)|WDOG_CS_CLK(1)|WDOG_CS_INT(1)|WDOG_CS_WIN(0)|WDOG_CS_UPDATE(0);
WDOG->CS = WDOG_CS_EN(1) | WDOG_CS_CLK(1) | WDOG_CS_INT(0) | WDOG_CS_WIN(0) | WDOG_CS_UPDATE(0) | WDOG_CS_DBG(1);
while(((WDOG->CS & WDOG_CS_RCS_MASK ) >> WDOG_CS_RCS_SHIFT) == 0);
INT_SYS_EnableIRQGlobal();
It's stuck here
while(((WDOG->CS & WDOG_CS_RCS_MASK ) >> WDOG_CS_RCS_SHIFT) == 0);
Hi Wang,
If you are trying to update/ reconfigure the watchdog after initial watchdog configuration like initial disable watchdog function or something
I suggest you use WDOG_CS_UPDATE(1) in your initial watchdog configuration.
Raju
Hi,
Regarding the watchdog, the code works on my side with both masksets (0N47T, 0N57U) as expected.
There is a restriction that the reconfiguration must be done within 128 bus cycles.
So you cannot step the code.
Regards,
Daniel
@Hello Daniel,
Thank you for your support.
could you please share your complete tested source code.
I tried with toggling the LED while refreshing the watchdog , but LED is not toggling.
directly flashed the code and checked.
EVAL board has PS32K144HFVLL 0N77P controller chip.
PCC-> PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock for PORT D */
PTD->PDDR |= 1<<0; /* Port D0: Data Direction= output */
PORTD->PCR[0] = 0x00000100; /* Port D0: MUX = ALT1, GPIO (to blue LED on EVB) */ WDOG->CNT = 0xD928C520; //unlock watchdog
DISABLE_INTERRUPTS();
while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0); //wait until registers are unlocked
WDOG->TOVAL = 0x1E8480; // used the default clock configuration , not configured clock in the code //set the count to 2000000
WDOG->CS = WDOG_CS_EN(1) | WDOG_CS_CLK(1) | WDOG_CS_INT(0) |
WDOG_CS_WIN(0) | WDOG_CS_UPDATE(0);
while(((WDOG->CS & WDOG_CS_RCS_MASK ) >> WDOG_CS_RCS_SHIFT) == 0); //wait until new configuration takes effect
ENABLE_INTERRUPTS(); //enable global interrupt
while(1)
{
//PTD->PDDR = 1;
if(WDOG->CNT >= 0xF4240) //if count is equal or greater 1000000
{
DISABLE_INTERRUPTS(); // disable global interrupt
WDOG->CNT = 0xB480A602; // refresh watchdog
ENABLE_INTERRUPTS(); //
PTD->PTOR |= 1<<0;
}
}
Thanks,
Ambarish
Hello Ambarish,
The problem is in the maskset (0N77P).
Please use either 0N47T or preferably 0N57U which is the production version.
There are many differences between 0N77P and 0N47T/0N57U.
The current RM is not compatible with that maskset.
WDOG_CS[ULK] is not present on 0N77P thus it reads 0.
Regards,
Daniel
Hi Daniel,
Thanks for the response.
I'm trying to implement the watchdog code and the code just has a while(1) loop with the below code. I expect the code will reset so I set a breakpoint at the start of the code to ensure the reset. But it still there is no reset happened.
DISABLE_INTERRUPTS();
WDOG->CNT = 0xD928C520; //unlock watchdog
while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0); //wait until registers are unlocked
WDOG->TOVAL = 256; // used the default clock configuration , not configured clock in the code //set the count to 2000000
WDOG->CS = WDOG_CS_EN(1) | WDOG_CS_CLK(1) | WDOG_CS_INT(0) |
WDOG_CS_WIN(0) | WDOG_CS_UPDATE(0);
while(((WDOG->CS & WDOG_CS_RCS_MASK ) >> WDOG_CS_RCS_SHIFT) == 0); //wait until new configuration takes effect
ENABLE_INTERRUPTS(); //enable global interrupt
Kindly suggest us a solution
Raju.