I'm not able to generate a 6 MHz Bitclock for SAI device in S32K148, to send out 4 channels 32-bit and FSYNC ~48 kHz

[alfonso_valenzu]

I'm working with Serial Audio Interface in S32K148 ins HSRUN mode, SPLL @112 MHz, BUS_CLK is 56 MHz.

 With this configuration I was expecting to have a BCLK  of ~6.1 MHz and FSYNC of ~48 kHz to send out audio in 4 channels with 32-bit sample width, using Interrupts or DMA.

If I try to configure a 5.6 MHz it works but the FSYNC is not the desired one, if I change to 5.7, the BCLK jumps to 6.8-7.1 MHz, any value in this range (5.6-6.8) results in 6.8-7.1 MHz, so, is there any restriction on generate a BCLK of ~6 MHz?

[alfonso_valenzu]

Hello everyone, I finally obtained the desired clock, I found useful configuration but still having problems with signal integrity, seems that the information is not being sent in the proper time, a lot of noise is introducedwhen using 6 MHz, when 3 MHz is used noise disappears, has anybody experienced this problem?

This application note may help you in calculating the clocks: S32K1xx Clock Calculator Guide

https://www.nxp.com/docs/en/application-note/AN5408.pdf 

[danielmartynek]

Hello,

Regarding the noise, do you use pads configured with fastest slew setting PCR[DSE] = 1?

See S32K148_IO_Signal_Description_Input_Multiplexing.xlsx

DSE is configurable with GPIO-HD pad type only. 

Regards,

Daniel