How to use the transmission abort mechanism

[_simple_]

In some cases, I need cancel send CAN frame,so I use the transmission abort mechanism.

According to S32K_RM.pdf, I write these code,but I find it don't work. 

The code is as follows：

void cancel(S32K_CAN_HW_NAME hw_name,CAN_HW_TX_OBJ obj)

{

CAN_Type * base = g_flexcanBase[hw_name];

volatile uint32_t *flexcan_mb = FLEXCAN_HAL_GetMsgBuffRegion(base, obj);

uint8_t cancel_confirmation;

flexcan_msgbuff_code_status_t cs;

cs.code = FLEXCAN_TX_ABORT;

flexcan_data_info_t dataInfo;

dataInfo.data_length = 8U;

#if CAN_HW_EXTEND_ID

dataInfo.msg_id_type = FLEXCAN_MSG_ID_EXT;

#else

dataInfo.msg_id_type = FLEXCAN_MSG_ID_STD;

#endif

    /* Set Freeze, Halt*/

    FLEXCAN_HAL_EnterFreezeMode(base);

    /* Abort enabled */

    BITBAND_ACCESS32(&(base->MCR), CAN_MCR_AEN_SHIFT) = (0x1);

    (base->IFLAG1) = (1 << obj);

    (base->IMASK1) = ((base->IMASK1) & ~(1 << obj));

    /*writing of abort code (0b1001) into the CODE field*/

    *flexcan_mb &= ~CAN_CS_CODE_MASK;

    *flexcan_mb |= (cs.code << CAN_CS_CODE_SHIFT) & CAN_CS_CODE_MASK;

/* clear IFLAG*/

    (base->IFLAG1) = (1 << obj);

    cancel_confirmation = ((*flexcan_mb & CAN_CS_CODE_MASK) >> CAN_CS_CODE_SHIFT);

    if(cancel_confirmation == FLEXCAN_TX_ABORT)

    {

    // aborted

    }

    else if(cancel_confirmation == FLEXCAN_TX_INACTIVE)

    {

    // transmitted

    }

    /* Abort disabled */

    BITBAND_ACCESS32(&(base->MCR), CAN_MCR_AEN_SHIFT) = (0x0);

    /* De-assert Freeze Mode*/

    FLEXCAN_HAL_ExitFreezeMode(base);

    FLEXCAN_DRV_ConfigTxMb(hw_name, obj, &dataInfo, 0x0);

}

[PetrS]

Hi,

The transmission abort is used when module is in normal mode, so the pending transmission can be aborted. You need not to put module to Freeze mode before.

But you must enable the Abort mechanism by setting MCR[AEN] bit before the abort can be used. This bit can be set in Freeze mode only, so for example during module initialization.

Then to abort pending transmission use the steps given in the RM:

• CPU checks the corresponding IFLAG and clears it, if asserted.
• CPU writes 0x9 into the CODE field of the C/S word.
• CPU waits for the corresponding IFLAG set
• CPU reads the CODE field to check if the frame was either transmitted (CODE=0x8) or aborted (CODE=0x9).

• It is necessary to clear the corresponding IFLAG in order to allow the MB to be reconfigured.

BR, Petr