About S32K1XXX LPSPI FIFO size

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About S32K1XXX LPSPI FIFO size

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yuegao1996
Contributor II

Hi,

I got few questions about the LPSPI FIFO as follows:

1. through the manual, it says the LPSPI has TX & RX FIFO of 4 words.  does "4 words ' here means the FIFO's depth is  4 and its width is 1 word, which is the FIFO size is 4 words?

 

2. If so,  the PARAM register can config the maximum number of words in the receive FIFO to 2^RXFIFO, which can reach 256? (I think it's kind of unreasonable)

3. FIFO Status Register(FSR) Returns the number of words currently stored in the FIFO, but it only has 3bit( 7 at most), so Is the maximum LPSPI FIFO size  7 words? if not, then what is it?

many thanks for your patience!

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Senlent
NXP TechSupport
NXP TechSupport

Hi@yuegao1996

Parameter Register(PARAM) is read-only register.

Senlent_0-1627614684938.png

The default value is :RXFIFO = 0x02,TXFIFO = 0x02,it’s means the maximum number of words in the receive/transmit FIFO is 4(2^0x02).

Senlent_1-1627614708182.png

Senlent_2-1627614779216.png

best regards!

Jim.

 

 

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Senlent
NXP TechSupport
NXP TechSupport

Hi@yuegao1996

Parameter Register(PARAM) is read-only register.

Senlent_0-1627614684938.png

The default value is :RXFIFO = 0x02,TXFIFO = 0x02,it’s means the maximum number of words in the receive/transmit FIFO is 4(2^0x02).

Senlent_1-1627614708182.png

Senlent_2-1627614779216.png

best regards!

Jim.

 

 

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yuegao1996
Contributor II

the FIFO size is 4 words, however the PARAM[8-15bir] register can set the max number of words in the fifo, which can reach up to 256. And also the reg is an RO register, so is the description 'set the ...of FIFO'  imprecise?

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yuegao1996
Contributor II

i've figured it out

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