PFE0 is connected to Serdes 1 lane 0 and PFE2 to Serdes 0 lane 1.
In u-boot/*/serdes_hwconfig.c, there is a combined validation that prevents both pfe0 and pfe2 to be configured in SGMII.
I don't understand why? Since both are on different Serdes instances what is the problem here?
I tried to configure both of them in SGMII from m7 cores and I can see the communication on both pfe 0 and 2.
S32G-VNP-RDB3 BSP-S32 S32G3
