Multiprocessor Affinity Register ( MPIDR )

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Multiprocessor Affinity Register ( MPIDR )

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NP1
Contributor III

Do we need to configure the MPDIR register while doing uboot, booting M7 or A53 core in S32g2 ?

Can I get any reference document

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NP1
Contributor III

where I can find reference example for S32G2 A53 boot.?

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NP1
Contributor III

Don't we need to read the MPDIR value and scale down  from el2 . I could see reference example for s32v for A53 boot ,there they are calling the api's __get_MPIDR_EL1(); and armv8_switch_to_el2 initially .

Can you confirm the we don't need this approach for S32G for both M7 and A53 cores ? 

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Bio_TICFSL
NXP TechSupport
NXP TechSupport

Hi,

There is not MPDIR in the S32G

Regards

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