How can I make Core A load uboot at the specified location of Flash after Core M starts on S32G?

SandalWood · ‎10-11-2022

My S32G board uses the NorFlsh+EMMC storage scheme. It is planned that the M-core image and A-core uboot will be stored in NorFlash, and the kernel, dtb and rootfs will be stored in EMMC.

When using the NorFlash startup mode, can I store the uboot in the specified location in norflash? For example, 0x5A0000?

I looked at the IVT structure and found that only the M core or A core can be started. If I choose to start the M core in the IVT Boot Configuration Word, how can I let the A core load uboot at the specified location of Flash?

Daniel-Aguirre · ‎10-17-2022

Hi,

For you to be able to boot both cores, you need to develop a bootloader that enables both cores to run the applications.

1) The idea is to develop an app_bootloader that uses CM7_0 to fetch both the NOR Flash code and eMMC code. A53_0 will not be used until the app_bootloader finishes fetching both needed codes and uploading them to the internal SRAM. The uboot will be loaded into internal memory from the flash devices and run once the app_bootloader finishes.

2) The code will not run in the Flash devices, the information/data is the one being saved. The code needs to be loaded into the internal SRAM or external DRAM. The IVT Table is unique and only one can be addressed (at least until today). This can be saved on NOR Flash (0x0000) or eMMC (0x1000), but not both. In this unique IVT you will need to address your app_bootloader that will fetch the information from the flash devices and load them to the internal SRAM or external DRAM. Also, this app_bootloader will need to enable the needed cores for the needed code.

In summary, a custom app_bootloader needs to be developed in order to fetch the data from the flash devices and load them to internal memory. This bootloader will be the one being selected/pointed in the IVT Table, not the application code/uboot itself.

Please, let us know if this information helps you or not.

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Daniel-Aguirre · ‎10-12-2022

Hi,

Regarding the store operation inside the NOR Flash, you can save the app code inside any address you want to (inside the capabilities of your storage device).

You can do this by changing the Start Address inside the IVT tool. The only section that cannot be moved is the IVT Table itself, every other section should be movable.

Regarding on the selection of the boot target, this is to tell the system which core will take over once the Boot Core (HSE_M7_Core, not M7_0 nor A53_0) finishes the setup. This is where the user application code is to be run in.

Regarding the storage of both the M7 app and the A53 uboot in the same flash, there will be restrictions on which core will have access to the QSPI peripheral, and the need of a synchronization mechanism for both the M and the A core to share this peripheral. The use case of running some code in the M core and uboot in the A core is to use the NOR Flash for the M Core application code and the eMMC/SD for the A Core uboot.

If there is a need of saving both in the same storage device, aside from modifying uboot to boot from a QSPI device, the end user will need to merge both images in a single binary and load it to the IVT tool. At this moment, I'm not aware of a way to save 2 images in the same device within the provided IVT Tool.

There is an Application Note [AN12422 S32G2 Boot Process, Rev. 5, 07/2022] talking about the boot process of the S32G2 platform. Maybe could give a better insight on what can be done during the boot process of the platform.

Please, let us know if this information helps you or not.

SandalWood · ‎10-12-2022

My understanding is that this IVT tool can be used to automatically generates the binary file on the basis of M7 APP.BIN or A53 UBOOT.BIN that can be recognized by the bootrom by defining parameters such as the sram location.

But my question is,

1)if I choose to start the M7 core, where is the A53 uboot set? I think I can only choose one, either M7 or A53.

2)If I run the M7 app in norfalsh and A53 uboot.bin in EMMC, will the uboot.bin in emmc also be configured using the IVT tool?If so, then there are two IVTs? One at 0x0h in NORFLASH and one at 0x1000h in EMMC?

Daniel-Aguirre · ‎10-17-2022

Hi,

For you to be able to boot both cores, you need to develop a bootloader that enables both cores to run the applications.

1) The idea is to develop an app_bootloader that uses CM7_0 to fetch both the NOR Flash code and eMMC code. A53_0 will not be used until the app_bootloader finishes fetching both needed codes and uploading them to the internal SRAM. The uboot will be loaded into internal memory from the flash devices and run once the app_bootloader finishes.

2) The code will not run in the Flash devices, the information/data is the one being saved. The code needs to be loaded into the internal SRAM or external DRAM. The IVT Table is unique and only one can be addressed (at least until today). This can be saved on NOR Flash (0x0000) or eMMC (0x1000), but not both. In this unique IVT you will need to address your app_bootloader that will fetch the information from the flash devices and load them to the internal SRAM or external DRAM. Also, this app_bootloader will need to enable the needed cores for the needed code.

In summary, a custom app_bootloader needs to be developed in order to fetch the data from the flash devices and load them to internal memory. This bootloader will be the one being selected/pointed in the IVT Table, not the application code/uboot itself.

Please, let us know if this information helps you or not.