LCU Configuration with 3 input and one LCU override

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

LCU Configuration with 3 input and one LCU override

420 次查看
emerging
Contributor III

Hello Team,

I am working with an LCU module configuration with three input and one lcu override and one output as shown below

LCU.png

  • For this 3 input and one lcu override how to perform the configuration, do we need to create separate LcuInputConfiguration containers for each input? 
  • Please give an idea on how to configure the input 2 (feed back from the output) and how to configure the lcu override.
  • On what basis we are giving the values lcuLogicInput_MuxSelect for each input?

It will be appreciable if anyone can provide an example configuration and coding that will help this configuration.

Thanks and regards

标记 (1)
0 项奖励
14 回复数

399 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@emerging

Here I can only help you solve some problems in understanding the features of the LCU module.

If it is related to MBDT, you need to ask questions in the MBDT forum.

 

1.For this 3 input and one lcu override how to perform the configuration, do we need to create separate LcuInputConfiguration containers for each input? 

       An LCU is composed of 3 independent LC modules, each of which has four inputs and outputs. So according to the content of your picture, I think one LC is enough.

 

2.Please give an idea on how to configure the input 2 (feed back from the output) and how to configure the lcu override.

The output of LC can be directly selected as the input of LC, which I have highlighted in the picture.

Senlent_0-1717734481696.png

 

        Software Override is actually very simple. You can see the schematic diagram given in the data sheet. In fact, you only need to modify these two registers (I have highlighted them)

"To use software override, you must enable it for the corresponding output (SWEN[SWEN]). You assert software override by writing 1 to the corresponding bit of the Software Override Value" (SWVALUE[SWVALUE]).

 

Senlent_1-1717734514161.png

 

3.On what basis we are giving the values lcuLogicInput_MuxSelect for each input?

    I don't know how to explain this question better.  its input needs to be based on your own needs.

     The module input of LC can come from TRGMUX(or self), and the input of TRGMUX can come from many modules, such as external ports, eMIOS modules, etc.It's all depend on your needs.

 

For your know:

        You can find the routines(Lcu_Ip_LcuControlMotor_S32K344) we provide for customers about the LCU module in S32 DS. In this routine, we also show the use of software override

 

 

0 项奖励

387 次查看
emerging
Contributor III

Hello @Senlent ,

Thanks for your reply, its very helpful to understand software override

Regarding the third query i was asked about the mux select. 

emerging_3-1717746427887.png

  • Here we have so many mux values are available, so on what basis we select its value. In this figure i can see that 12 containers are created inside main container 'LCU Logic Input'(highlighted part), so do you have 12 inputs and created one container for each input? If so, on what basis we are selecting 'Mux Select' for each inputs? 

emerging_1-1717742368841.png

  • In my application, input one and two coming from trigmux LCU0_LC0_SEL0 and LCU0_LC0_SEL1 so what value of mux i can select for input one and two?
  • Lcu_Ip_LcuControlMotor_S32K344 Where i can find the input details or schematic for this application. If the input and output connections are available then its better to understand the configuration easily

Thanks and regards,

0 项奖励

379 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@emerging

Q1:Here we have so many mux values are available, so on what basis we select its value. In this figure i can see that 12 containers are created inside main container 'LCU Logic Input'(highlighted part), so do you have 12 inputs and created one container for each input? If so, on what basis we are selecting 'Mux Select' for each inputs? 

Senlent_0-1717749709744.png

You can see each LCU instance have three hardware logic cell which is :

LCU_IP_HW_LC_0, LCU_IP_HW_LC_1 and LCU_IP_HW_LC_3

each hardware logic have 4 input choice

For Mux Select:

LCU_IP_HW_LC_0  can choose :

              LCU_IP_MUX_SEL_LU_IN_0 ~ LCU_IP_MUX_SEL_LU_IN_3

LCU_IP_HW_LC_1 ->

             LCU_IP_MUX_SEL_LU_IN_4 ~ LCU_IP_MUX_SEL_LU_IN_7

LCU_IP_HW_LC_2 ->

             LCU_IP_MUX_SEL_LU_IN_8 ~ LCU_IP_MUX_SEL_LU_IN_11

 

Q2:In my application, input one and two coming from trigmux LCU0_LC0_SEL0 and LCU0_LC0_SEL1 so what value of mux i can select for input one and two?

 

You should use TRGMUX module to select input source for LCU0_LC0_SEL0 and LCU0_LC0_SEL1.

("Hardware Input" depend on your needs and application.)

For example,Here i config LCU0_LC0_SEL0 and LCU0_LC0_SEL1  are both choose

TRGMUX_INPUT_LOGIC0_VSS as input source.

Senlent_1-1717749863157.png

 

Q3.Lcu_Ip_LcuControlMotor_S32K344 Where i can find the input details or schematic for this application. If the input and output connections are available then its better to understand the configuration easily

This routine didn't add TRGMUX but only software way to control LCU input and output.

 

Regarding TRGMUX connect map, you can find it in our S32K3XXRM's attachments.

 

 

 

 

 

0 项奖励

298 次查看
emerging
Contributor III

Hello @Senlent ,

I have few more doubts regarding LCU configuration settings and implementation.

1. As per our requirement we have to give one delay in LCU0_LC1 as shown below

emerging_1-1718356312210.png

How can we give this delay to LCU0_LC0, is it given through configuration or coding?

2. Regarding the coding part what all have the steps we follow? 

  • As per my understanding I have to initialize mcl and LCU , then Lcu_Ip_SetSyncInputSwOverrideValue() and Lcu_Ip_SetSyncInputSwOverrideEnable() for control SW override value,is this enough in coding part? all other functions will automatically run after the configuration, is my understanding correct? Do i need to remove or add anymore steps?
  • we are already enabling the output in configuration so do we need Lcu_Ip_SetSyncOutputEnable() API in code?

Could you please look on my queries and reply your valuable suggestions and comments. Looking forward from you,

Thanks and regards

 

 

 

0 项奖励

296 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@emerging

Q1.you can configurate it directly

Senlent_0-1718357938093.png

 

Q2.From the picture your provided, you just need to init and enable the LCU out.

Lcu_Ip_Init(); /* initialize the LCU module */

Lcu_Ip_SetSyncOutputEnable(); /* Apply LCU output configuration */

0 项奖励

320 次查看
emerging
Contributor III

Hello @Senlent ,

Thanks for your all valuable information, it will help me to proceed further . I will come back if any more query in the future.

Thanks and Regards,

0 项奖励

174 次查看
emerging
Contributor III

Hello @Senlent ,

May i know how we can get the output status of LCU_LC whether its one or zero. I seen the function Lcu_Ip_GetSyncLogicOutput() when checked LCU document, 

Currently i have given one array for my one output 

Lcu_Ip_SyncOutputValueType LCU0_LC0_OutputList[1] =
{
{LCU_LOGIC_OUTPUT_1, FALSE},
};

then calling the following steps and functions 

LCU0_LC0_OutputList[0U].Value = LCU_IP_OUTPUT_ENABLE;


Lcu_Ip_SetSyncOutputEnable(&LCU0_LC0_OutputList[0U], 1);

Lcu_Ip_GetSyncLogicOutput(LCU0_LC0_OutputList, 1);

As per my expectation i have to get value of 1 in the array LCU0_LC0_OutputList when the lcu out is one but i am getting zero there in the array.

 

emerging_0-1719415545891.png

 

Is this sufficient to check the lcu output status, if yes, could you please let me know the correct usage of this function.

please check this scenario and please support me with your feedback

Thanks and regards

标记 (1)
0 项奖励

157 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@emerging

There is nothing wrong with your usage
This API can get the output status of the LCU channel, but I don't see the input of your LCU module. If your LCU module has no input, then this result is not normal, right?
You can use an oscilloscope or multimeter to verify this API.

0 项奖励

155 次查看
emerging
Contributor III

Hello @Senlent ,

I have given input and confirmed the output is one with multimeter, issue facing with this function to get the output value that's why i mentioned only the output related steps here in my question.

Thanks for your conformation Selent. I will cross check my implementation and try to dubug.

Thanks and Regards,

0 项奖励

151 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@emerging

You're welcome, if you still have question, please provided your project and i will help you to check it.

0 项奖励

94 次查看
emerging
Contributor III

Hi @Senlent ,

I am very much thankful for your support. It will be more easy if i can share my project but i am not sure about it.

The above issue is resoved and my thanks for your support

But unfortunately i have one more block.

emerging_0-1719539301540.png

 

As you can see above i have two sw override in input pin 2 and 3 and i am able to control pin 2 in software by enabling sw override and i control the output as one and zero. But the second override with latch i am not able to control

I made the pin 2 as one with sw override and checked and confirmed the corresponding output is one and the output is latched to 3rd input,so even after i made the pin2 low the output is maintained as one because of output latch. Till this its working,but after i am trying to change the 3rd input pin as zero i am expecting my out will be zero because both the input 2 and three as zero. but unfortunately the output is keeping as one.

Here i am mention my configurations and code, 

Configuration:

emerging_1-1719539415002.png

 

Below are the final step i used to control the pin 3 after latch:

Lcu_Ip_SyncInputValueType LCU0_LC0_InputList[LCU0_LC0_INPUT_DIMENSION] =
{
    {LCU_LOGIC_INPUT_2, FALSE},
    {LCU_LOGIC_INPUT_3, FALSE},
};

Lcu_Ip_SyncOutputValueType LCU0_LC0_OutputList[LCU0_LC0_OUTPUT_DIMENSION] =
{
    {LCU_LOGIC_OUTPUT_1, FALSE},
};
 
 
            /* Set input signals software override values */
        LCU0_LC0_InputList[1U].Value = LCU_IP_SW_OVERRIDE_LOGIC_LOW;
        Lcu_Ip_SetSyncInputSwOverrideValue(&LCU0_LC0_InputList[0U], 2);

        /* Set input signals by enabling software override */
        LCU0_LC0_InputList[1U].Value = LCU_IP_SW_OVERRIDE_ENABLE;
        Lcu_Ip_SetSyncInputSwOverrideEnable(&LCU0_LC0_InputList[0U], 2);

        /* Enable LCU0_LC0 specific outputs */
        LCU0_LC0_OutputList[0U].Value = LCU_IP_OUTPUT_ENABLE;
        Lcu_Ip_SetSyncOutputEnable(&LCU0_LC0_OutputList[0U], 1);
 
Could you please check whether i have done correctly or not and give your valuable feedback ASAP then its very helpful
 
Thanks and regards
0 项奖励

86 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@emerging

For LC0 input 3 channel, you cannot apply LC0 output and SW OVERRIDE to channel 3 at the same time. This is incorrect.

You can change it like below picture shows.

Senlent_0-1719543471667.png

 

0 项奖励

70 次查看
emerging
Contributor III

Hi @Senlent ,

  • Actually sw override means it override another input value. But here your point is, sw override can override all other inputs other than a latch input from an output.
  • We can enable software override for each inputs separately

Could you please confirm my understanding is correct or not?

Thanks and regards

0 项奖励

63 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@emerging

This is a selector where only one input can be active at a time.

Senlent_0-1719548664178.png

 

0 项奖励