Ld error: undefined reference to `Eth_43_PFE_Config' in S32DS 3.4

[viswa_kondapall]

Hi,

CAN2CAN reference project we took as reference and we added PFE into that :

1. PFE is configured files from EB tresos.

2. ETH_43_0.9.7 plugins include and src copied.

3. Generated include and src copied to the CAN2CAN project. all compilation errors were fixed. 

but at last i got 524 erros which are 

Category 1:

c:/nxp/s32ds.3.4/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/../../../../arm-none-eabi/bin/real-ld.exe: ./PFE/Eth_43_PFE_TS_T40D11M09I7R0/src/Eth_43_PFE.o: in function `Eth_43_PFE_Init':
C:\S32-DS-Workspace\Llce_Can2Can_Fast-path\Llce_Can2Can_Fast-path\Debug_RAM/../PFE/Eth_43_PFE_TS_T40D11M09I7R0/src/Eth_43_PFE.c:353: undefined reference to `Eth_43_PFE_Config'

Error: Header files is added in the list but still this issue is coming. 

category 2: 

c:/nxp/s32ds.3.4/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/../../../../arm-none-eabi/bin/real-ld.exe: C:\S32-DS-Workspace\Llce_Can2Can_Fast-path\Llce_Can2Can_Fast-path\Debug_RAM/../PFE/Eth_43_PFE_TS_T40D11M09I7R0/src/oal_mutex_autosar.c:223: undefined reference to `SchM_Exit_Eth_43_PFE_ETH_EXCLUSIVE_AREA_00'

reference :

My doubt : Is this Linked error or Memory allocation issue ?? 

Linker file : 

HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x00003000;

ENTRY(Reset_Handler)

MEMORY
{
int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00000000 /* 0KB - Not Supported */
int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* 64KB */
int_sram_shareable : ORIGIN = 0x22C00000, LENGTH = 0x00004000 /* 16KB */
int_sram : ORIGIN = 0x34000000, LENGTH = 0x00200000 /* 2MB */
int_sram_rsvd : ORIGIN = 0x34200000, LENGTH = 0x00200000 /* 2MB */
int_sram_stack_c0 : ORIGIN = 0x34400000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c1 : ORIGIN = 0x34402000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c2 : ORIGIN = 0x34404000, LENGTH = 0x00002000 /* 8KB */
int_sram_no_cacheable : ORIGIN = 0x34500000, LENGTH = 0x0008C800 /* 512KB + 50K (overflowed by 47904 bytes so increased by 50k bytes*/
int_sram_no_cache_rsvd : ORIGIN = 0x3458C800, LENGTH = 0x00073800 /* 512KB - 50Kbytes = */
ram_rsvd2 : ORIGIN = 0x34600000, LENGTH = 0 /* End of SRAM */

LLCE_CAN_SHAREDMEMORY : ORIGIN = 0x43800000 LENGTH = 0x3D000
LLCE_LIN_SHAREDMEMORY : ORIGIN = 0x4383D000 LENGTH = 0x3000
LLCE_BOOT_END : ORIGIN = 0x43840000 LENGTH = 0x50
LLCE_MEAS_SHAREDMEMORY : ORIGIN = 0x4384FFDF LENGTH = 0x20
}

SECTIONS
{

.sram :
{
. = ALIGN(4);
KEEP(*(.core_loop))
. = ALIGN(4);
*(.startup)
. = ALIGN(4);
*(.text.startup)
. = ALIGN(4);
*(.text)
*(.text*)
. = ALIGN(4);
*(.mcal_text)
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
KEEP(*(.fini))

. = ALIGN(4);
*(.rodata)
*(.rodata*)
. = ALIGN(4);
*(.mcal_const_cfg)
. = ALIGN(4);
*(.mcal_const)
. = ALIGN(4);
__init_table = .;
KEEP(*(.init_table))
. = ALIGN(4);
__zero_table = .;
KEEP(*(.zero_table))

. = ALIGN(4);
*(.acfls_code_rom)
. = ALIGN(4);
*(.aceep_code_rom)
. = ALIGN(4);
*(.acmcu_code_rom)
. = ALIGN(4);
*(.ramcode)
. = ALIGN(4);
*(.data)
*(.data*)
. = ALIGN(4);
*(.mcal_data)
. = ALIGN(16);
__sram_bss_start = .;
*(.bss)
*(.bss*)
. = ALIGN(16);
*(.mcal_bss)
. = ALIGN(4);
__sram_bss_end = .;
} > int_sram

. = ALIGN(4);
__sram_shareable_rom = .;

.non_cacheable :
{
. = ALIGN(4);
KEEP(*(.int_results))
. += 0x100;
. = ALIGN(4096);
__interrupts_ram_start = .;
KEEP(*(.intc_vector))
. = ALIGN(4);
__interrupts_ram_end = .;
. = ALIGN(16);
__non_cacheable_bss_start = .;
*(.mcal_bss_no_cacheable)
. = ALIGN(4);
__non_cacheable_bss_end = .;
. = ALIGN(4);
*(.mcal_data_no_cacheable)
. = ALIGN(4);
*(.mcal_const_no_cacheable)
HSE_LOOP_ADDR = .;
LONG(0x0);
. = ALIGN(0x40000);
KEEP(*(.pfe_bmu_mem))
. = ALIGN(4);
KEEP(*(.pfe_bd_mem))
. = ALIGN(4);
KEEP(*(.pfe_buf_mem))
} > int_sram_no_cacheable
/* heap section */
.heap (NOLOAD):
{
. += ALIGN(4);
_end = .;
end = .;
_heap_start = .;
. += HEAP_SIZE;
_heap_end = .;
} > int_sram_no_cacheable

.llce_boot_end (NOLOAD) :
{
/* ------------------------------------ llce_boot_end sections ------------------------------------ */
. = ALIGN(0x4);
*(.llce_boot_end)
} > LLCE_BOOT_END

.can_43_llce_sharedmemory (NOLOAD) :
{
/* ------------------------------------ can_43_llce_sharedmemory sections ------------------------------------ */
. = ALIGN(0x4);
*(.can_43_llce_sharedmemory)
} > LLCE_CAN_SHAREDMEMORY

.lin_43_llce_sharedmemory (NOLOAD) :
{
/* ------------------------------------ lin_43_llce_sharedmemory sections ------------------------------------ */
. = ALIGN(0x4);
*(.lin_43_llce_sharedmemory)
} > LLCE_LIN_SHAREDMEMORY

.llce_meas_sharedmemory (NOLOAD) :
{
/* ------------------------------------ llce_meas_sharedmemory sections ------------------------------------ */
. = ALIGN(0x4);
*(.llce_meas_sharedmemory)
} > LLCE_MEAS_SHAREDMEMORY

.shareable_ram_bss (NOLOAD):
{
. = ALIGN(16);
__shareable_bss_start = .;
KEEP(*(.mcal_shared_bss))
. = ALIGN(4);
__shareable_bss_end = .;
} > int_sram_shareable

.shareable_ram_data : AT(__sram_shareable_rom)
{
. = ALIGN(16);
__shareable_data_start = .;
KEEP(*(.mcal_shared_data))
. = ALIGN(4);
__shareable_data_end = .;
} > int_sram_shareable

__sram_shareable_rom_end = __sram_shareable_rom + (__shareable_data_end - __shareable_data_start);

__Stack_end_c0 = ORIGIN(int_sram_stack_c0);
__Stack_start_c0 = ORIGIN(int_sram_stack_c0) + LENGTH(int_sram_stack_c0);
__Stack_end_c1 = ORIGIN(int_sram_stack_c1);
__Stack_start_c1 = ORIGIN(int_sram_stack_c1) + LENGTH(int_sram_stack_c1);
__Stack_end_c2 = ORIGIN(int_sram_stack_c2);
__Stack_start_c2 = ORIGIN(int_sram_stack_c2) + LENGTH(int_sram_stack_c2);
__Stack_end_c3 = 0;
__Stack_start_c3 = 0;

__INT_SRAM_START = ORIGIN(int_sram);
__INT_SRAM_END = ORIGIN(ram_rsvd2);

__INT_ITCM_START = ORIGIN(int_itcm);
__INT_ITCM_END = ORIGIN(int_itcm) + LENGTH(int_itcm);

__INT_DTCM_START = ORIGIN(int_dtcm);
__INT_DTCM_END = ORIGIN(int_dtcm) + LENGTH(int_dtcm);

__RAM_SHAREABLE_START = ORIGIN(int_sram_shareable);
__RAM_SHAREABLE_END = ORIGIN(int_sram_shareable) + LENGTH(int_sram_shareable) - 1;
__ROM_SHAREABLE_START = __sram_shareable_rom;
__ROM_SHAREABLE_END = __sram_shareable_rom_end;
__RAM_NO_CACHEABLE_START = ORIGIN(int_sram_no_cacheable);
__RAM_NO_CACHEABLE_END = ORIGIN(int_sram_no_cacheable) + LENGTH(int_sram_no_cacheable) - 1;
__ROM_NO_CACHEABLE_START = 0;
__ROM_NO_CACHEABLE_END = 0;
__RAM_CACHEABLE_START = ORIGIN(int_sram);
__RAM_CACHEABLE_END = ORIGIN(int_sram) + LENGTH(int_sram) - 1;
__ROM_CACHEABLE_START = 0;
__ROM_CACHEABLE_END = 0;

__BSS_SRAM_START = __sram_bss_start;
__BSS_SRAM_END = __sram_bss_end;
__BSS_SRAM_SIZE = __sram_bss_end - __sram_bss_start;

__BSS_SRAM_NC_START = __non_cacheable_bss_start;
__BSS_SRAM_NC_SIZE = __non_cacheable_bss_end - __non_cacheable_bss_start;
__BSS_SRAM_NC_END = __non_cacheable_bss_end;

__BSS_SRAM_SH_START = __shareable_bss_start;
__BSS_SRAM_SH_SIZE = __shareable_bss_end - __shareable_bss_start;
__BSS_SRAM_SH_END = __shareable_bss_end;

__RAM_INTERRUPT_START = __interrupts_ram_start;
__ROM_INTERRUPT_START = 0;
__ROM_INTERRUPT_END = 0;

__INIT_TABLE = __init_table;
__ZERO_TABLE = __zero_table;

__RAM_INIT = 0;
__ITCM_INIT = 0;
__DTCM_INIT = 1;
/* Discard boot header in RAM */
/DISCARD/ : { *(.boot_header) }

}

Is this error is Linker error or Memory issue - i will add Map in attachments.

[RachelGomez123]

The error message suggests that there is an undefined reference to Eth_43_PFE_Config in the Eth_43_PFE_Init function in the Eth_43_PFE.c file. This error is likely due to a missing function definition or library.

Here are some steps you can take to troubleshoot the issue:

Check if the function Eth_43_PFE_Config is defined in any of the source files or included libraries. If it is not defined, you will need to provide a definition for it.

Make sure that all necessary source files and libraries are included in the project build. It is possible that the library containing the definition of Eth_43_PFE_Config is not being linked properly.

Check the build configuration settings to ensure that the appropriate libraries and include directories are specified.

If you have made any changes to the project configuration or source code, try reverting them to the original state and see if the error persists.

If the error still persists, try reaching out to the CAN2CAN reference project or PFE support team for further assistance. They may have encountered similar issues and can provide guidance on how to resolve them.

Regards,

Rachel Gomez

[nxf92355]

Hi Viswanath

Hope you are doing well

You are using can2can example code as reference and adding pfe in it. Can you tell us what is your goal ?

i mean you adding to develop can2eth ? or else

Regards ,

Tushar