SWI interrupt and stack frame

[Ghibli]

Hi, may be somebody can give me an advise in flw. cases.
I've to convert assembler code written for HC11 to support now a 9S12XA512 controller.
Inside the code are a lot of SWI interrupts. Now I recognize flw. during debugging.
If there is an SWI interrupt, the stack is filled with nine bytes as I assumed (all registers plus CCR), but after the CCR (9'th byte)is stored on the stack, the IPL is also stored onto the stack (10'th byte). Unfortunately I can't find any advise in the CPU12RM or MC912XDP512 documentation about this behaviour. Further this is not compatible with the HC11 SWI instruction.
I'm confused about that, but may be I'm doing something wrong.

P.S. I'm using CW 4.5 build 6037 with newest update.

[Steve]

The S12X CPU context is one byte larger than the HC11's (and HC12's) so stack frames are always 10 bytes long. This is described in the CPU manual and in AN2615. This shouldn't cause a problem unless you are accessing values inside the stack frame since the RAM on the S12XA is much bigger than the RAM on the HC11. If you are running out of stack space you should be able to allocate more RAM to the stack. If you are accessing values inside the stack frame you will need to adjust your code offsets but it maybe easier to re-write the code since the instruction set of the S12X is much richer than the HC11.

You should also read Appendix B of the CPU manual for differences between the HC11 and HC12.