SCI can't weak up low power mode of MC9S12XEP100

[于志明]

When I debug MC9S12XEP100 with low power mode, the chip can enter the stop mode and weak up from stop mode by SCI interrupt, but the SCI baud rate has changed. I found the relevant datasheet, but I can't find solution.So  I want to ask how to solve the SCI baud rate is not normal when the chip wakes up.

This is my code to enter low power mode.

SCI0SR2_AMAP = 1;
SCI0ACR1_RXEDGIE = 1;

CLKSEL_PSTP = 0; // Oscillator is disabled in Stop Mode (Full Stop Mode)
asm ANDCC #0x7F;
asm(nop);
EnableInterrupts;
asm STOP;

This is my code to exit stop mode.

#pragma CODE_SEG __NEAR_SEG NON_BANKED
void interrupt 20 SCI0_ISR(void)
{

/**/if(SCI0SR2_AMAP)
{
//SCI0ACR1 = 1;
SCI0ACR1_RXEDGIE = 0;
SCI0SR2_AMAP = 0;
}
SCI0CR2_RIE=0;
;
uart_putchar(SCI_receive());
//uart_putchar('k');
SCI0CR2_RIE = 1;
}

Hopefully someone can give me some advice and solutions.

[lama]

Hi,

I suppose this is the answer:

Data sheet states:

Table 11-6. CLKSEL Field Descriptions

PLL Select Bit
Write: Anytime.
Writing a one when LOCK=0 has no effect. This prevents the selection of an unstable PLLCLK as SYSCLK.
PLLSEL bit is cleared when the MCU enters Self Clock Mode, Stop Mode or Wait Mode with PLLWAI bit set.

Moreover, in dependance on clock startup time and PLL startup time and SCI bit rate it can happen that the first byte of incomming message will not be received correctly.

Best regards,

Ladislav