S12ZVML PWM output not correct in independent mode

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S12ZVML PWM output not correct in independent mode

Jump to solution
850 Views
gary_lu1
Contributor II

Dear team,

    We need to  drive a DC-motor by H-bridge,so we used 4 independent channels(HG0,LG0,HG1,LG1) to output PWM(Used GDU module,20kHz frequency) in S12ZVML MCU.

   The questions as follow:

    When we configured 4 channels PWM as independent mode,we set 20% duty at HG0,80% duty at LG0.HG0 output is ok,but LG0 output only is 60% duty. We watched PWM register is correct,but LG0 output duty is not correct(only 60%). 

    But when we switch 4 channels PWM as complementary mode,all output are ok(HG0 20%,LG0 80%).

    We offer some wave and pictures,could you help us to solve this problems?

gary_lu1_0-1689322963273.png

gary_lu1_1-1689323126067.png新建文件1.png新建文件21.png

gary_lu1_2-1689324108280.png

 

 

 

 

 
0 Kudos
1 Solution
747 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @gary_lu1,

 

The GDU module does not allow the LGx and HGx pins to be active (HIGH) at the same time.

If the independent PWMs are incorrectly configured, the GDU will ground one of the signals in the pair.

 

PWMPRR[1] is available for ZVMC256 only

But PWMPRR[0] is available on all the S12ZVM parts.

danielmartynek_0-1690284637838.png

danielmartynek_1-1690284719381.png

1. Probe function

PWMPRR = 0b01 All PMF channels connected to related PWM1_x pins

2. PWM directly router to GPIOs.

The pins can be directly routed to PWM1_n pins (PWMxxRR = 0b111), which would disable signals to the GDU.

 

There are PWM1_n pins on ZVML128

PT0, PT1, PT2, PP0, PP1, PP2

 

PT2:

danielmartynek_2-1690285110604.png

 

Regards,

Daniel

View solution in original post

0 Kudos
4 Replies
748 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @gary_lu1,

 

The GDU module does not allow the LGx and HGx pins to be active (HIGH) at the same time.

If the independent PWMs are incorrectly configured, the GDU will ground one of the signals in the pair.

 

PWMPRR[1] is available for ZVMC256 only

But PWMPRR[0] is available on all the S12ZVM parts.

danielmartynek_0-1690284637838.png

danielmartynek_1-1690284719381.png

1. Probe function

PWMPRR = 0b01 All PMF channels connected to related PWM1_x pins

2. PWM directly router to GPIOs.

The pins can be directly routed to PWM1_n pins (PWMxxRR = 0b111), which would disable signals to the GDU.

 

There are PWM1_n pins on ZVML128

PT0, PT1, PT2, PP0, PP1, PP2

 

PT2:

danielmartynek_2-1690285110604.png

 

Regards,

Daniel

0 Kudos
731 Views
gary_lu1
Contributor II

Thank you very much.

We have found the root cause,when PWMs were configured independent,we set

Set(HG0,20%duty),Set(LG0,80%duty)At the same time ,the HG0 and LG0 will start calculate duty in one time base,and the HG0 and LG0 be actived,so HG0 duty = (80% duty -20% duty(HG0)),beacuse all of them be configured with postive.

We have changed ways to realise out function,thank you again!

836 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @gary_lu1,

Can you probe the PWM signals at the PWM1_x pins, so that you can see the Pulse-Width Modulator signals before it goes to the GDU.

danielmartynek_0-1689334737870.png

Can you show both waveforms of the PWMs (HGx, LGx) in a single image? 

 

Thank you,

Daniel

0 Kudos
758 Views
gary_lu1
Contributor II

Hi Daniel,

Sorry for reply so late beacuse network limited.

We can not probe the PWM signals beacuse  only avalible for ZVMC256,but we used ZVML128,no PWM_1 pins be found.

I showed the waveforms of PWMs in one image.(yellow:HG0,purple:LG0).

新建文件24.png

gary_lu1_0-1690245484647.png

Furthermore,we tried to change the PWM polarity(Top-Side:postive,Bottom-side:negative),and the waveforms are ok.But we think it not a finals ways for above problems.

Could you give us some advice?

0 Kudos