Hi @gary_lu1,
The GDU module does not allow the LGx and HGx pins to be active (HIGH) at the same time.
If the independent PWMs are incorrectly configured, the GDU will ground one of the signals in the pair.
PWMPRR[1] is available for ZVMC256 only
But PWMPRR[0] is available on all the S12ZVM parts.


1. Probe function
PWMPRR = 0b01 All PMF channels connected to related PWM1_x pins
2. PWM directly router to GPIOs.
The pins can be directly routed to PWM1_n pins (PWMxxRR = 0b111), which would disable signals to the GDU.
There are PWM1_n pins on ZVML128
PT0, PT1, PT2, PP0, PP1, PP2
PT2:

Regards,
Daniel