S12ZVL128 How to configure AN0/PAD0 as digital input?

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S12ZVL128 How to configure AN0/PAD0 as digital input?

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heshamyassin
Contributor I

We are using DEVKIT-ZVL128 and we need to configure the pin AN0/PAD0 as digital input and the register PTADL is always giving us the pin high when following is the configuration used:

DDRADL = 0x00;

PERADL = 0x00;

DIENADL = 0xFF;

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

You may try reading the input state directly from Port Input Register (PTIADL). But you should be able to read input state from Port data register (PTADL) as well. Port data register is mainly used when the port is configured as an output. It holds the date that have been written to it. In input mode, however, a read from PTADL returns data from PTIADL.

The configuration is correct. I don’t see any problem.

 

Regards,

Daniel

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heshamyassin
Contributor I

Hi Daniel,

Thank you for your information. My question is why pin PAD0 state is having default high voltage. When applying zero volt on it, the pin's state is zero and when removing the zero volt, it returns to its default high voltage.

Find below the attached screenshot for PortADL containing PAD0. All pins in the port have zero value except PAD0 has 1. 

PAD0.PNG

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

 

In input mode, if the port is not driven by an external device and pull-ups/pull-downs are not used, then the input port is left floating. It might read high, it might read low.

 

Regards,

Daniel

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