MC9S12XEP100 intermittent timer fails to start O/C operation

[roberthiebert]

MC9S12XEP100, absolute assembler. I have a program that uses channels on both ECT and TIM timers that are set up for output compare. The first call sets a delay time for the output to go high. Most of the time it all works fine, but occasionally it will miss, but be fine the next call. In this example code snippet I am using ECT channel 3, but it is typical for all of the timer channels I am using.

TimerDelay   ds 2

BSET  ECT_TCTL2,#$80  ; Set bit 7 (Set Ch3 output line to 1 on compare) 

BSET  ECT_TCTL2,#$40  ; Set bit 6 (Set Ch3 output line to 1 on compare)

LDD   ECT_TCNT              ;  Timer Count Register -> Accu D

ADD  TimerDelay                ; Add without carry TimerDelay with current timer count

STD   ECT_TC3                   ; Copy result to Timer IC/OC register 3 (Start OC operation)

Am I doing anything wrong here?

Regards,

Robert

[roberthiebert]

Oops, Typo, Should read:

TimerDelay   ds 2

BSET  ECT_TCTL2,#$80  ; Set bit 7 (Set Ch3 output line to 1 on compare) 

BSET  ECT_TCTL2,#$40  ; Set bit 6 (Set Ch3 output line to 1 on compare)

LDD   ECT_TCNT              ;  Timer Count Register -> Accu D

ADDD  TimerDelay              ; Add without carry TimerDelay with current timer count

STD   ECT_TC3                   ; Copy result to Timer IC/OC register 3 (Start OC operation)

[roberthiebert · Accepted solution]

I discovered the error of my ways. Even though the first call is not from an interrupt, it is necessary to clear the flag first anyway. I made this change and all is good now.