How to emulate EEPROM on  the flash memory of MC9S12DG128?

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How to emulate EEPROM on  the flash memory of MC9S12DG128?

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maru
Contributor I

Dear All,

 

I was running out on the non volatile memory storage and need to save additional 2048 byte data,

I read that we can use the flash memory to emulate the EEPROM. but I dont know how to begin with.

 

Could someone advise me what my options are and point me to an example code please.

 

Thanks in advance and appreciate your help

 

Regards

 

Maru

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Lundin
Senior Contributor IV

Esentially, the EEPROM and flash are used in the same manner on this MCU (actually the EEPROM is a kind of flash).

 

I'm sure there are app notes for it, but if you have managed to write code to handle the EEPROM, then the flash shouldn't be hard. You need separate routines for them, but the routines do pretty much the same thing: calculate and setup a pre-scaler clock, erase before writing, handle security etc.

 

The notable differences between EEPROM and flash on this part are:

 

 - EEPROM segments have a minimum erase size of 4, while flash segments have a minimum erase size of 512.

- The flash structure on the DG128 is this: two banks of 64kb, each with 4 pages of 16kb. Each page has 32 flash segments of 512 bytes.

- Sneakily hidded deep down at some obscure location in the manual, you can read which page that resides in which bank. It goes like this. Bank 0: page 3C, 3D, 3E, 3F. Bank 1: page 38, 39, 3A, 3B. 3E and 3F correspond to the "non-paged" pages at 0x4000 and 0xC000.

- NOTE: code executed from one bank cannot erase/program flash residing in the same bank as itself. If you write such code, the program will go haywire.

 

Therefore you need to ensure that the code handling erase/program of some flash in one bank is executed from the other. There are highly questionably app notes suggesting that you should execute the erase/program code from RAM. Don't execute the code from RAM, on the DG128 there is no point of doing so, since it has multiple banks.

 

It is convenient to use the "non-paged" (16-bit addressable) pages from 0x4000 or 0xC000 to hold this erase/program code. That will save you from a lot of trouble with altering PPAGE etc. If you want to use interrupts for the flash programming, they must also have 16-bit addresses.

 

So if you chose to put the erase/program code in that area, it means that the rest of bank 0 is off limits to hold the data you want to program.

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Lundin
Senior Contributor IV

Esentially, the EEPROM and flash are used in the same manner on this MCU (actually the EEPROM is a kind of flash).

 

I'm sure there are app notes for it, but if you have managed to write code to handle the EEPROM, then the flash shouldn't be hard. You need separate routines for them, but the routines do pretty much the same thing: calculate and setup a pre-scaler clock, erase before writing, handle security etc.

 

The notable differences between EEPROM and flash on this part are:

 

 - EEPROM segments have a minimum erase size of 4, while flash segments have a minimum erase size of 512.

- The flash structure on the DG128 is this: two banks of 64kb, each with 4 pages of 16kb. Each page has 32 flash segments of 512 bytes.

- Sneakily hidded deep down at some obscure location in the manual, you can read which page that resides in which bank. It goes like this. Bank 0: page 3C, 3D, 3E, 3F. Bank 1: page 38, 39, 3A, 3B. 3E and 3F correspond to the "non-paged" pages at 0x4000 and 0xC000.

- NOTE: code executed from one bank cannot erase/program flash residing in the same bank as itself. If you write such code, the program will go haywire.

 

Therefore you need to ensure that the code handling erase/program of some flash in one bank is executed from the other. There are highly questionably app notes suggesting that you should execute the erase/program code from RAM. Don't execute the code from RAM, on the DG128 there is no point of doing so, since it has multiple banks.

 

It is convenient to use the "non-paged" (16-bit addressable) pages from 0x4000 or 0xC000 to hold this erase/program code. That will save you from a lot of trouble with altering PPAGE etc. If you want to use interrupts for the flash programming, they must also have 16-bit addresses.

 

So if you chose to put the erase/program code in that area, it means that the rest of bank 0 is off limits to hold the data you want to program.

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maru
Contributor I

Dear Lundin,

 

Thanks for your reply,

 

Basically I'm taking over the project that was done years back by some one and I had hard time following how they did on EEPROM programming .

 

Now, you clear for me some points that I had doubt. The other issue I had is the code was developed using Cosmic C and the linker file is some what complicated. there is comments on the link file  that say  "page 30.... page 37"  I think it should be typo or mistake. right??  there is is also memory address some thing like 0xf4000 on the linker file. I don't understand how that is working as well . may be I missing something how the linker file works. 

 

Anyway, I will do further research on Monday and will get back to you.

 

Once again, thank you very much and have a great weekend!!! 

 

Maru

 

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kef
Specialist I

I'm not Cosmic user, but page 30 , page 37 should mean PPAGE 0x30 and PPAGE 0x37, or chunk of flash, which is mapped to PPAGE window at 0x8000-0xBFFF when you write 0x30 or 0x37 to PPAGE register.

Address 0xF4000 must be so called linear or so called physical address. It is some convention of how to uniquely address S12 flash memory. It is calculated as PPAGE*size_of_PPAGE_window + PPAGE_window_offset. So if you divide 0xF4000 by size of PPAGE window = 0x4000, you get 0x3D, it is PPAGE 0x3D. Hope this helps.

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