Hi everyone !
I am desperate for som help regarding a VERY mysterious bug.
I get perfectly OK ADC input from ch0 and ch1, but ch2-ch5 are dead ( ! )
No interrupts, just SCAN mode ch0 to ch5, where I get good values in ATDDR0 and ATDDR1 but
zeroes or small static values in ATDDR2, ATDDR3, ATDDR4 and ATDDR5.
I mean how can it be working for two channels and not with six ?? Since the two is working, inits, clock, I/O
frerunning mode, ref modes and so on must be right. It should be only ATDCTL3 "conversion sequence length"
bits S1C-S8C that sets how many channels to sample. I have quadruplechecked they are 0110 = 6 channels.
(ATDCTL3 = 32h (50d)). SCAN=1, MULTichannel =1 (ATDCTL5 = B0h (176d))
I have developed two separate projects, both with a 9S12E64 mpu, relocatable assembler, and they show exactly the same bug. Everything else, DACs, SCIO, std IO works like a charm.
Softwares is made completely from scratch, each proj individually - i did not use one as base for the other.
I used PE to autogenerate initialization. See code snippets below.
Full code attached.
Please help, i'm going insane !! 
Proj facts:
Relocateable Assmbler
CW IDE version 5.9.0 build 2836
MPU: MC9S12E64CFU 16Mhz osc, 8Mhz int
PE autogenerated code:
**************************************************************************************************
; ### Init_ADC init code
; ATDCTL3: S8C=0,S4C=1,S2C=1,S1C=0,FIFO=0,FRZ1=1,FRZ0=0
MOVB #50,ATDCTL3
; ATDCTL4: SRES8=0,SMP1=0,SMP0=1,PRS4=0,PRS3=0,PRS2=1,PRS1=0,PRS0=1
MOVB #37,ATDCTL4
; ATDCTL2: ADPU=1,AFFC=0,AWAI=0,ETRIGLE=0,ETRIGP=0,ETRIGE=0,ASCIE=0,ASCIF=0
MOVB #128,ATDCTL2
; The following delay loop generates a delay of approx. 20us, which is needed for
; the module to recover from power down state.
;
; * Delay
; * - requested : 20 us @ 8MHz,
; * - possible : 160 c, 20000 ns
; */
pshd ; (2 c: 250 ns) backup D */
.
.
.
; ATDCTL5: DJM=1,DSGN=0,SCAN=1,MULT=1,CD=0,CC=0,CB=0,CA=0
MOVB #176,ATDCTL5
; ### Init_FLASH init code
; FPROT: FPOPEN=1,NV6=1,FPHDIS=1,FPHS1=1,FPHS0=1,FPLDIS=1,FPLS1=1,FPLS0=1
**************************************************************************************************
;***********************************************************************
;***
;*** Read & average (oversampling) analog inputs
;***
;***********************************************************************
ReadAD ldaa ad_seq ; 0 - read channel 0
bne _ad10
ldd ATDDR0 ; read result data register 0 (two bytes)
ldx ad_bufp0 ; get pointer
std 2,X+ ; store reading into filter array
cpx #ad_buf0e ; end of array ?
bne _ad00 ; BI not
ldx #ad_buf0 ; else reinit pointer
_ad00 stx ad_bufp0 ; save pointer
ldd #0
ldx #ad_buf0
_ad02 addd 2,X+ ; sum all values
cpx #ad_buf0e ; end of array ?
bne _ad02 ; BI not
std ad_temp
inc ad_seq
rts
_ad10 cmpa #1 ; 1 - read channel 1
bne _ad20
ldd ATDDR1 ; read result data register 1 (two bytes)
ldx ad_bufp1 ; get pointer
std 2,X+
cpx #ad_buf1e ; end of array ?
bne _ad11 ; BI not
ldx #ad_buf1
_ad11 stx ad_bufp1 ; save pointer
ldd #0
ldx #ad_buf1
_ad12 addd 2,X+ ; sum all values
cpx #ad_buf1e ; end of array ?
bne _ad12 ; BI not
std ad_wpres ; save water pressure
inc ad_seq
rts
_ad20 cmpa #2 ; 2 - read channel 2
bne _ad30
ldd ATDDR2 ; read result data register 2 (two bytes)
ldx ad_bufp2 ; get pointer
std 2,X+
cpx #ad_buf2e ; end of array ?
bne _ad21 ; BI not
