I have an external HW pin from PTT2 connected on to PP4 in the HW and I want to edge trigger the ADC conversions with ADC in trigger mode. I have done the module routing in MODRR1 register for edge trigger on PP4 for rising edge, where the output compare event on the PTT2 pin controls the edge trigger Pin PP4 (direction as input). I am able to generate the PTT2 output compare event onto PP4 but I dont see the ADC conversion complete interrupt set. Is there any setting that I am missing. How is the ADCFLWCTL suppose to update at beginning.of CSL, End of sequence and End of list when ADC conversions are edge triggered? Is there any additional setting needs to be done for PP4 ( as per data sheet the ETRIG0 is the highest priority). I dont find any reference code for this feature. Can I get some support and feedback on this ticket as it is urgent. Kindly let me know if any further info is required.
Thanks in advance, Jaya
please check the InitADC() function as in example:
MODRR1_TRIG0RR = 0x3; // Set ADC trigger on PP4;
ADC0CTL_0 = 0x0D; // Dual access, Trigger mode
ADC0CTL_1 = 0x10; // single CSL & RVL buffers, Normal access Automatic restart after stop
ADC0STS = 0x00; // Select CSL 0 & RVL 0
ADC0TIM = 0x01; // Set fbus/(2*(PRS+1)) = 16MHz/4 = 4MHz
ADC0FMT = 0x82; // 10Bits right justified
ADC0CONIE = 0x01; // Enable EOL interrupt
ADC0CTL_0_ADC_EN = 1; // Enable ADC
Also the polarity of the input edge signal on the PP4 pin could be checked.
I hope it could help you to solve your issue.