ACCERR randomly set on XD256, mask set 1M84E

[sjmelnikoff]

We wrote a bootloader for the XD256. It was initially tested on an XD256 mask set 0L15Y, and worked fine.

The same code was later programmed into an XD256 with mask set 1M84E, and failed at the start of every file download.

The problem appears to be that ACCERR is being set randomly at some point prior to any flash operations. When the first flash operation is triggered, ACCERR is checked, found to be set, and cleared. This should allow the operation to proceed, but it is not.

I've used the debugger to see what's going on, and discovered something else strange: if I single step through the code, then ACCERR remains clear after a reset. However, if I run the code - even if I set a breakpoint for the line immediately after the current one, and press Run - then the bit is set!

I've tried this with interrupts enabled and disabled during single-stepping. I've also tried the bootloader with flash protection and security on and off. Nothing seems to make any difference.

As I said, identical code worked perfectly on the other mask set, and I couldn't see anything obvious on the errata for the two masks, nor in the family data sheet.

So: any ideas?

[sjmelnikoff · Accepted solution]

This turned out to be a symptom of another problem, rather than the cause.

I may create a new post on the underlying matter once it's been resolved.

[saravanakumar_m]

Hello!

I face the same issue as well. My software runs on S12XDT256 with maskset 0L15Y but not on maskset 1M84E. Could you kindly tell how you solved this problem! 

Thanks a lot!

Best Regards,

Saravana

[kef]

0L15Y is 512kB flash maskset (like XDT512).  1M84E is true XD256 (256kB of flash) maskset. So if bootloader was made to blankcheck most of 512kB flash space, it will work on 0L15Y, but will be illegal-access-error reset trying to blankcheck nonexisting flash space. On 0L15Y you have contiguous flash space from 0x780000'G to 0x7FFFFF'G. On 1M84E there's a memory gap from 0x7A0000'G to 0x7DFFFF'G, or flash P-pages 0xE8 to 0xF7 are missing.