On our board based on lx2160a design, we use marvell 88x5113 phy to connect to serdes 1, and use 4 port 25g mode，(21 in the document).
this is part of the dpc configuration
board_info {
ports {
mac@3 {
link_type = "MAC_LINK_TYPE_FIXED";
};
mac@4 {
link_type = "MAC_LINK_TYPE_FIXED";
};
mac@5 {
link_type = "MAC_LINK_TYPE_FIXED";
};
mac@6 {
link_type = "MAC_LINK_TYPE_FIXED";
};
mac@17 {
link_type = "MAC_LINK_TYPE_PHY";
};
};
};
but after initializing and setting phy host side to 25GBase-R RS-FEC, the dpmac state became unstable.
the specific performance
$ restool dpmac info dpmac.x
the state of link is down will appear, and it will change back to link is up within a few seconds. Of course, the network port corresponding to the dpni connected to the dpmac is also the same
The first such unstable dpmac is usually dpmac.3, and dpmac.4/6 occasionally appears
But contrary to dpmac, when accessing the status of phy through mdio, the status of phy corresponding to lane does not have the problem of link down.
Based on the above background, I would like to ask what condition is the corresponding state of dpmac to judge the link state? It is mentioned in the document that it is based on the status of pcs, but I am not sure what caused the status change, if possible, please tell me how to debug this process
The previous background is the dilemma we are currently encountering, if anyone has a solution available I would be very grateful
