According to the reference manual, this is the sequence to disable CPC for T1040/T2080:
# a. Clear all bits in CPCPAR0-CPCPAR15 to prevent new transactions from allocating in the CPC
# b. Set CPCCSR0[CPCFL]
# c. Wait for CPCCSR0[CPCFL] to be cleared by hardware
# d. Clear CPCCSR0[CPCE]
in u-boot, I did this:
mw 0xfe010208 0x0; sleep 1; mw 0xfe010000 0xc0000800; sleep 5; mw 0xfe010000 0x0; sleep 1
is that correct?
Thanks!
The only remark is that you should clear 15 CPCPARn registers on the first step : 0xfe010208 - 0xfe0102e8
Have a great day,
Pavel
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I found a document called “Cache Latencies of the PowerPC MPC7451” by Bill Brock/Michael Exerman. Is there similar document for the T1040 (e5500)/T2080 (e6500) processors?
Thanks!
Thanks!
When L3 (CPC) is disabled for the T1040, the throughput seemed to get better (i.e. the code execute faster)! I’m confused! Is there an explanation for that?