T2080 Refernce design IFC

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T2080 Refernce design IFC

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hemanttiwari199
Contributor III

Hello Sir,

In T2080 Refernce design, I am having few queries to ask

1) what is CFG_VBANK?

2) What is the importance of CFG_VBANK in NOR flash(JS28F00AM29EWHA) 1Gb memory interface? can i remove SN74LVC1G86 IC and directly connect ifc_a7 , ifc_a6 and ifc_a5 to IFC bus?

3) what will be changes will come in the design if i want to upgrade my nor flash size?

a) to 512 megabit

b) to 2 gigabit

How many virtual bank will be require in the above mention memory sizes (512 migabit and 2gigabit)?

Waiting for your reply.

Attaching the image for your reference

Regards

Hemant

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hemanttiwari199
Contributor III

Hi,

One more query with respect to IFC

why 74LVC16373 has been used in the design? what is the importance of 74LVC16373?

attaching the image for your reference.

Regards

Hemant

pastedImage_1.png

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ufedor
NXP Employee
NXP Employee

This latch is required to provide stable Address for the NOR Flash during the read/write access from the Address/Data signals - for example refer to the QorIQ T2080 Reference Manual, Figure 13-40. Normal GPCM program operation - non-burst mode.

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ufedor
NXP Employee
NXP Employee

1) It is a method to "divide" single NOR Flash device into several "virtual banks" so the processor will be able to boot from anyone of them.

2) Yes.

3) You wrote:

> How many virtual bank will be require in the above mention memory sizes?

This is up to the board/application designer.

Concerning the "virtual bank" memory size please consider:

Despite that the RDB implementation gives 8 "virtual banks", only two of them are used in Linux SDK - 0 and 4.

Effectively in this case the NOR Flash is divided into two halves.