T1042 Could not get PHY for FSL_MDIO0: addr 5 Failed to connect

[megaloldeanmega]

Hello nxp community!

I have a problem with my device based on t1042. 
My device does not ping itself and does not ping the server:

=> ping 192.168.2.1
Using FM1@DTSEC5 device

ARP Retry count exceeded; starting again
ping failed; host 192.168.2.1 is not alive

Using FM1@DTSEC5 device

Abort
ping failed; host 192.168.2.1 is not alive
=> ping 192.168.0.10
Using FM1@DTSEC5 device

ARP Retry count exceeded; starting again
ping failed; host 192.168.0.10 is not alive

The whole problem - 
Could not get PHY for FSL_MDIO0: addr 5

How can i fix this?

All listing:

U-Boot 2016.012.0+ga9b437f (Sep 17 2018 - 15:18:49 +0300)

CPU0: T1042, Version: 1.1, (0x85200211)
Core: e5500, Version: 2.1, (0x80241021)
Clock Configuration:
CPU0:1400 MHz, CPU1:1400 MHz, CPU2:1400 MHz, CPU3:1400 MHz,
CCB:600 MHz,
DDR:533.333 MHz (1066.667 MT/s data rate) (Asynchronous), IFC:150 MHz
QE:300 MHz
FMAN1: 600 MHz
QMAN: 300 MHz
PME: 300 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 0c10000e 0e000000 00000000 00000000
00000010: 08000000 00400002 ec027000 01000000
00000020: 00000000 00000000 00000000 00035800
00000030: 00000000 40165a05 00000000 00000000
I2C: ready
Board: T1042D4RDB
Board rev: 0x01 CPLD ver: 0x02, vBank: 7
SPI: ready
DRAM: Initializing....Configuring DDR for 1066.667 MT/s data rate
ddr_size after setting fixed size = 80000000
ddr_size after setting fixed size 888888888 = 80000000
dram_size 1 80000000
dram_size 2 0
dram_size 3 a
2 GiB (DDR3, 64-bit, CL=11, ECC on)
Flash: 256 MiB
L2: 256 KiB enabled
Corenet Platform Cache: 256 KiB enabled
Using SERDES1 Protocol: 8 (0x8)
NAND: 0 MiB
MMC: FSL_SDHC: 0
QE microcode not found
PCIe1: Root Complex, no link, regs @ 0xfe240000
PCIe1: Bus 00 - 00
PCIe2: Root Complex, no link, regs @ 0xfe250000
PCIe2: Bus 01 - 01
PCIe3: Root Complex, no link, regs @ 0xfe260000
PCIe3: Bus 02 - 02
PCIe4: disabled
DIU: Switching to monitor DVI @ 1024x768
I2C: failed to select proper dvi test pattern
Failed to set DVI encoder
In: serial
Out: serial
Err: serial
SERDES Reference : 0x8
Net: Initializing Fman
Fman1: Uploading microcode version 106.4.18
Could not get PHY for FSL_MDIO0: addr 5
Failed to connect
FM1@DTSEC4 [PRIME], FM1@DTSEC5
Hit any key to stop autoboot: 0

Environment

=> printenv
baudrate=115200
bdev=sda3
bootargs=root=/dev/ram rw console=ttyS0,115200
bootcmd=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr
bootdelay=10
bootfile=uImage
consoledev=ttyS0
eth1addr=00:04:9F:02:01:FD
eth2addr=00:04:9F:02:02:FD
eth3addr=00:04:9F:02:03:FD
eth4addr=00:04:9F:02:04:FD
eth5addr=00:04:9F:02:05:FD
ethact=FM1@DTSEC4
ethaddr=00:04:9F:02:00:FD
ethprime=FM1@DTSEC4
fdtaddr=0x00c00000
fdtfile="t1042rdb/t1042d4rdb.dtb"
fman_ucode=eff00000
gatewayip=192.168.2.1
hwconfig=fsl_ddr:bank_intlv=cs0_cs1;usb1:dr_mode=host,phy_type=utmi;usb2:dr_mode=host,phy_type=utmi
ipaddr=192.168.0.10
loadaddr=0x1000000
netdev=eth0
netmask=255.255.255.0
nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr
ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr
ramdiskaddr=0x02000000
ramdiskfile="t104xrdb/ramdisk.uboot"
rootpath=/opt/nfsroot
serverip=192.168.2.1
tftpflash=tftpboot $loadaddr $uboot && protect off $ubootaddr +$filesize && erase $ubootaddr +$filesize && cp.b $loadaddr $ubootaddr $filesize && protect on $ubootaddr +$filesize && cmp.b $loadaddr $ubootaddr $filesize
uboot="u-boot.bin"
ubootaddr=0xeff40000
video-mode="video-mode=fslfb:1024x768-32@60,monitor=dvi"

Environment size: 1729/8188 bytes

mdio list
FSL_MDIO0:
4 - Generic PHY <--> FM1@DTSEC4

[yipingwang]

Hello megaloldean megaloldean,

Please refer to the following section in include/configs/T104xRDB.h, please modify the PHY address on MDIO bus according to your hardware design.

#ifdef CONFIG_FMAN_ENET
#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
#define CONFIG_SYS_SGMII1_PHY_ADDR             0x03
#elif defined(CONFIG_T1040D4RDB)
#define CONFIG_SYS_SGMII1_PHY_ADDR             0x01
#elif defined(CONFIG_T1042D4RDB)
#define CONFIG_SYS_SGMII1_PHY_ADDR             0x02
#define CONFIG_SYS_SGMII2_PHY_ADDR             0x03
#define CONFIG_SYS_SGMII3_PHY_ADDR             0x01
#endif

#ifdef CONFIG_T104XD4RDB
#define CONFIG_SYS_RGMII1_PHY_ADDR             0x04
#define CONFIG_SYS_RGMII2_PHY_ADDR             0x05
#else
#define CONFIG_SYS_RGMII1_PHY_ADDR             0x01
#define CONFIG_SYS_RGMII2_PHY_ADDR             0x02
#endif

Have a great day,
TIC

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