Hello,
In our project we use CPU P-4080, p/n-P4080NSN7PNC
I try to synchronize caching and I/O memory in my code.
I have mapping of one physical memory area to two virtual blocks. First block has cacheable access and second standard I/O access.
I write to physical memory via cache and try to read from I/O. See picture
Between the write and read process, I add call to sync() function, for flash cache data to memory.
I can't read correct data from memory via I/O mapping block.
Also I tried to use assembly call "mbar" with or without parameter.
The result is same - wrong data after read operation.
Is somebody know how to synchronize the cache and I/O access?
Thanks in advance
Alexei
Please, refer to Section 3.4 of this application note:
https://www.nxp.com/docs/en/application-note/AN3441.pdf
If cacheable accesses are used, the store should be followed by the following:
1. dcbf or dcbst to the same address
2. msync
3. Load from the same address
Have a great day,
Pavel
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------