SPI NOR FLASH problem on the LS2085ARDB

[QiujuYe]

when bootup the ls2085ardb, the board is REV D, sdk version is SDK-V2.0-1701, uboot and linux both can not detect the SPI NOR flash, MT25QU512ABB8ESF-0SIT.

under uboot command line:

      => sf probe

      Invalid bus 0 (err=-19)
      Failed to initialize SPI flash at 0:0 (error -19)

      => sf probe 1:0
      SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000
      Failed to initialize SPI flash at 1:0 (error -22)

the  log when start kernel:

      [    2.205359] m25p80 spi0.0: unrecognized JEDEC id bytes: 00, 00, 00

[ufedor]

Please understand that "1701" means January 2017 - more that two years ago.

The LS2085A processor is no longer manufactured and is not supported by modern LSDK.

[QiujuYe]

OK , understand, thanks very much.

[QiujuYe]

thanks for your reply.  I understand the reason. but it seems can not set the address under the u-boot:

=> mw.b 0x20000055  0x5 1   
"Synchronous Abort" handler, esr 0x96000046
ELR:     fff1cc7c
LR:      fff1cc38
x0 : 0000000000000004 x1 : 0000000020000055
x2 : 0000000000000001 x3 : 0000000000000000
.......
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 00000000ffd05110

Resetting CPU ...

### ERROR ### Please RESET the board ###

[ufedor]

Please provide complete U-Boot log and dump of IFC registers.

[QiujuYe]

attachment file is the uboot log and IFC registers, please check, thanks very much.

[ufedor]

In the provided log:

02240030: 00000000 20000085 00000000 00000000

This means that IFC CS3 uses GPCM and has base address 0x20000000.

Please provide memory dump of the CS3 area.

[QiujuYe]

the address also have  the same error.

=> md 0x20000000

20000000:"Synchronous Abort" handler, esr 0x96000006
ELR:     fff66584
LR:      fff66560
x0 : 00000000ffd050b8 x1 : 000000000000003a
x2 : 0000000000000020 x3 : 0000000020000000
......
x26: 0000000000000004 x27: 0000000000000004
x28: 0000000000000000 x29: 00000000ffd05030

Resetting CPU ...

### ERROR ### Please RESET the board ###

[ufedor]

I assume that the issue could be connected with the fact that firmware is very old.

Please try to upgrade.

[QiujuYe]

sorry, I do not know  where to get the new firmware and how to upgrade.

otherwise, in kernel log, 

[    1.523919] fsl-ifc 2240000.ifc: Freescale Integrated Flash Controller
[    1.530515] fsl-ifc 2240000.ifc: IFC version 2.0, 8 banks

show the version, it seems new.

and  I found in the dts file under the uboot, no ifc  device tree node, also no nor, nand and cpld, but have device tree nodes in dts file under the linux kernel, so whether is impacted due to no ifc,cpld nodes under the uboot. but why can access the ifc registers, can not access cpld registers.

[ufedor]

> [    1.530515] fsl-ifc 2240000.ifc: IFC version 2.0, 8 banks

This is version of the IFC module - not SDK.

You wrote:

> sdk version is SDK-V2.0-1701

Current version is LSDK 1903.

Main problem is - the board in question is equipped with LS2085A processor which is no longer manufactured and is not supported by modern LSDK.

[QiujuYe]

in document QorIQ-SDK-2.0-1701-IC-Rev0.pdf,  it support LS2085ARDB,  when compiling machine , ls2080ardb is selected, so also not supported? ohterwise, we would better use LSDK 1903, not  QorIQ SDK?

[ufedor]

Please try to set the CPLD register BRDCFG5=0x5 to enable SPI signals multiplexing.

In U-Boot the BRDCFG5 address is 0x20000055