P2020 support 36BIT, board.cfg options setting

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P2020 support 36BIT, board.cfg options setting

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kuoweihsu
Contributor III

Hi,

Our development board using p2020 needs to support 4G SDRAM. So we need CONFIG_36BIT enable.

In board.cfg, we add our config like

Status, Arch,     CPU:SPLCPU,    SoC,        Vendor,         Board name,         Target,                         Options,

Active  powerpc     mpc85xx          -             freescale        develop-1              DEVELOP-1                   -  

Active  powerpc     mpc85xx          -             freescale        develop-1              DEVELOP-1_36BIT      develop-1:36BIT

Q1: we have a develop-1.h under include/configs/ and folder develop-1 under board/freescale/. As I know the options format <board>:[other options], so I setting develop-1:36BIT. Is it correct??

Q2: we add DEVELOP-1 first and then DEVELOP-1_36BIT. If we want to build DEVELOP-1_36BIT, should we need to type from "bitbake -c cleansstate u-boot" or what command can we use to save our time build new configuration?? For example, bitbake -c clean <target>, bitbake -c cleansstate <target>, bitbake -c cleanall <target>.

At last, we using boot code not support 36BIT in our board which have a 4G SDRAM, then we see.

Not enough bank(chip-select) for CS0+CS1 on controller 0, interleaving disabled!

Detected 4 GiB of memory

       This U-Boot only supports < 4G of DDR

       You could rebuild it with CONFIG_PHYS_64BIT

       2 GiB (DDR3, 64-bit, CL=6, ECC off)

Thanks for any response.

Best Regard,

Kuowei Hsu

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1 Solution
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yipingwang
NXP TechSupport
NXP TechSupport

Hello Kuowei Hsu,

In SDK 1.6, P2020RDB supports 36bit u-boot, please refer to the follow 36 bit memory map.

pastedImage_2.png

For u-boot customizing for your target, please check whether the following steps would be better.

1. Clean u-boot Cache and get u-boot source code.

$ bitbake -c cleansstate u-boot

$ bitbake -c patch u-boot

2. Go to u-boot source folder build_p2020rdb_release/tmp/work/p2020rdb-fsl-linux-gnuspe/u-boot/2014.01+fslgit-r0/git/ to modify the source file.

Please modify these files according to your target board.

include/configs/P1_P2_RDB.h

Files in board/freescale/p1_p2_rdb_pc/, for example ddr.c, law.c, tlb.c.

3. The u-boot configuration P2020RDB-PC_36BIT has already been defined in meta-fsl-ppc/conf/machine/p2020rdb.conf

4. Rebuild U-Boot image

$ cd build_p2020rdb_release

$ bitbake -c compile -f u-boot

$ bitbake u-boot

If further assistance is needed, please feel free to let me know.


Have a great day,
Yiping

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kuoweihsu
Contributor III

We also modify p2020rdb.conf under meta-fsl-ppc/conf/machine/

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Kuowei Hsu,

In SDK 1.6, P2020RDB supports 36bit u-boot, please refer to the follow 36 bit memory map.

pastedImage_2.png

For u-boot customizing for your target, please check whether the following steps would be better.

1. Clean u-boot Cache and get u-boot source code.

$ bitbake -c cleansstate u-boot

$ bitbake -c patch u-boot

2. Go to u-boot source folder build_p2020rdb_release/tmp/work/p2020rdb-fsl-linux-gnuspe/u-boot/2014.01+fslgit-r0/git/ to modify the source file.

Please modify these files according to your target board.

include/configs/P1_P2_RDB.h

Files in board/freescale/p1_p2_rdb_pc/, for example ddr.c, law.c, tlb.c.

3. The u-boot configuration P2020RDB-PC_36BIT has already been defined in meta-fsl-ppc/conf/machine/p2020rdb.conf

4. Rebuild U-Boot image

$ cd build_p2020rdb_release

$ bitbake -c compile -f u-boot

$ bitbake u-boot

If further assistance is needed, please feel free to let me know.


Have a great day,
Yiping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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kuoweihsu
Contributor III

Dear Yiping,

Thanks a lot! We build 36-bit version successfully by your suggestion. Thanks!

Best Regard,

Kuowei Hsu

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