P2020's memory updating from DDR2 to DDR3

[billy_huan]

Hi NXP：

Our new design should update P2020's memory from DDR2 to DDR3.

But there is no ddr reset pin of P2020 mmu.

So, how can I deal with the ddr reset logic without CPLD?

Can connect the pin to Power on reset directly?

Billy Huan

B.R.

[billy_huan]

I got it.

Thanks a lot.

[ufedor]

As  DDR3 reset it is possible to use a copy of the reset signal going to the P2020's HRESET input.