Hi,
I am having issues on my MPC5602P erasing the FLASH. Per the reference manual, I execute the following sequence:
MCR = 0x00000004; /* Set ERS in MCR: Select Operation */
LMS = 0x00000006; /* Set LSL2-1 in LMS: Select Sectors to erase */
(0x000000) = 0xFFFFFFFF; /* Latch a Flash Address with any data */
MCR = 0x00000005; /* Set EHV in MCR: Operation Start */
do /* Loop to wait for DONE=1 */
{ tmp = MCR; /* Read MCR */
} while ( !(tmp & 0x00000400) );
status = MCR & 0x00000200; /* Check PEG flag */
MCR = 0x00000004; /* Reset EHV in MCR: Operation End */
MCR = 0x00000000; /* Reset ERS in MCR: Deselect Operation */
When performing the erase interlock write, I get a bus error. Any insight on why that would be? I have verified through the code flash registers that the block is both unlocked and selected for erase. When I write to 0x0000000, I get a bus error. The freescale driver seems to have the same issue, for me at least.
Any help would be greatly appreciated.
Thanks.
MM
解決済! 解決策の投稿を見る。
I found that the issue at hand was the watchdog in my case. Even though I was using the callback supplied by the Freescale flash routines to service the watchdog, the watchdog was not being serviced fast even to prevent a watchdog reset. When I increased the watchdog duration such that the flash routines serviced the watchdog before the watchdog timeout, my issues went away.
MM
I found that the issue at hand was the watchdog in my case. Even though I was using the callback supplied by the Freescale flash routines to service the watchdog, the watchdog was not being serviced fast even to prevent a watchdog reset. When I increased the watchdog duration such that the flash routines serviced the watchdog before the watchdog timeout, my issues went away.
MM
I faced the same problem - the only solution that i found was to change the latch address to a Data Flash Address (like 0x00800000 on SPC5602D). I think this is a "system" lock out protection. A erase command work normally this way.