9131RDB: AIC in bridged mode

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

9131RDB: AIC in bridged mode

跳至解决方案
2,446 次查看
rcreddy
Contributor III

Hi FreeScaleTeam,

                              Can AIC be put in bridged mode [9131RDB]. In other words, i dont want AIC to offer its services of timing, packaging the symbols for MAPLE. all i want is the data feed into AIC [from RFIC] should be routed to System Memory.

Thanks

RC Reddy

1 解答
2,263 次查看
yipingwang
NXP TechSupport
NXP TechSupport

Hello RC REDDY,

You are correct, DMA is transferring data from AIC buffers to system memory. In fact, data in AIC buffers has been reorganized into its corresponding antenna buffers compared to IQ data captured from RFIC lane. If AIC is used, it can only be implemented in LTE modes, user specific data rate bypass mode can not be achieved.

Thanks,

Yiping

在原帖中查看解决方案

6 回复数
2,263 次查看
rcreddy
Contributor III

Hi Freescale Team,

                I am awaiting your reply. please respond.

 

Thanks

RC Reddy

0 项奖励
回复
2,263 次查看
yipingwang
NXP TechSupport
NXP TechSupport

Hello RC REDDY,

The AIC DMA can be configured to unicast the data from RFIC to system memory only, the RDD field in the following register can be set for this purpose

AIC_DMA_DMSR_parallel_Ln field descriptions (continued)

Field Description

8–7

RDD

Receive Data Destination. This field determines where the received IQ data will be written by DMA.

0x0 Unicast to system memory only

0x1 Unicast to MAPLE only

0x2 Multi Unicast to MAPLE and system memory

0x3 Reserved


Have a great day,
Yiping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 项奖励
回复
2,263 次查看
rcreddy
Contributor III

Hi Yiping,

              I believe there is some misunderstanding. The RDD corresponds to the data to be DMA'ed from AIC buffers to the System or Maple, but NOT directly from RFIC . Can you please confirm this. Also if such possibility exists in Receive direction, same thing should be possible in Tx direction i.e. DSP to RFIC directly..i don't see any such field.

what i wanted to know is AIC should act like a JUST PASS THRU lanes, is such kind of behaviour possible in both Tx and Rx directions.

by the way, thanks for your reply. I almost lost hopes that no one from FSL will reply ever. Also kindly look at the questions i asked related to aic loopback demo example.

Thanks

RC Reddy

0 项奖励
回复
2,264 次查看
yipingwang
NXP TechSupport
NXP TechSupport

Hello RC REDDY,

You are correct, DMA is transferring data from AIC buffers to system memory. In fact, data in AIC buffers has been reorganized into its corresponding antenna buffers compared to IQ data captured from RFIC lane. If AIC is used, it can only be implemented in LTE modes, user specific data rate bypass mode can not be achieved.

Thanks,

Yiping

2,263 次查看
d_li
Contributor III

Just to clarify, this means we can only use LTE sampling rates w/ their corresponding symbol sizes??

0 项奖励
回复
2,263 次查看
rcreddy
Contributor III

Hi Freescale Team,

                I am awaiting your reply. please respond.

  

Thanks

RC Reddy

0 项奖励
回复