8GB DDR3 interfacing

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8GB DDR3 interfacing

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qammarabbas
Contributor IV

Hi,
I am trying to interface 8GB DDR3L RAM with T1042. How can i achieve it? Maximum size of a DDR3L RAM chip is 1GB and the reference manual of T1042 clearly mentions that there are only 4 chip selects available. Consequently, i can only interface 4GB (4*1GB) RAM with it. But i've seen some boards where T1042 is interfaced with a 8GB RAM. Please guide me if i am doing something wrong. Thank you!

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ufedor
NXP Employee
NXP Employee

Your understanding is correct.

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797 次查看
ufedor
NXP Employee
NXP Employee

Note that the T1042 DDR controller supports 64-bit-wide bus.

Please refer to the QorIQ T1040 Reference Manual, 14.5.1.1 Supported DDR SDRAM Organizations.

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797 次查看
qammarabbas
Contributor IV

Yes, i have seen this. But how can i interface 8GB RAM with T1042? 

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ufedor
NXP Employee
NXP Employee

What exactly is not clear?

2017-11-03_143820.jpg

797 次查看
qammarabbas
Contributor IV

Well i am confused between the two terms "bank" and "chip". What does a chip mean? Does it mean a single SDRAM chip (SDRAM Device in the table) or does it mean a bank which can support many chips?

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ufedor
NXP Employee
NXP Employee

> What does a chip mean? Does it mean a single SDRAM chip

Chip = single SDRAM device

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qammarabbas
Contributor IV

If that is the case then we have 4 chip selects available and the maximum size of 1 chip can be 1GB according to this table. using all 4 chip selects will then give me 4GB maximum (4*1GB). How can i get 8GB?

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ufedor
NXP Employee
NXP Employee

Please read the processor's RM and and consider that the table in question shows data for the 64-bit SDRAM bank.

It is obvious that several SDRAM chips must be used to form 64-bit memory bank - examples:

16-bit chip x 4

8-bit chip x 8

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qammarabbas
Contributor IV

Thank you!
Please correct me if i am wrong. For a single bank of 64 bits, if i am using 8bit SDRAM devices to build this 64 bit bank then i'll be using 8 SDRAM devices. So, all those 8 SDRAM devices will be given 1 chip select (suppose MCS0_B)?

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ufedor
NXP Employee
NXP Employee

Your understanding is correct.

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qammarabbas
Contributor IV

Thanks a lot ufedor

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