Help to understand Virtual Bank B4860

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Help to understand Virtual Bank B4860

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1,766 次查看
canvanquyen
Contributor III

Hi everybody,

Anybody here can help me understand bellow table in documentation "B4860QDSRM_rev8.pdf"

vbank.jpg

Could you explain why the table need to add more than one column.

This table shows in session 3.2 virtual bank.

Thank you for your help.

Leo.

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1 解答
1,531 次查看
lunminliang
NXP Employee
NXP Employee

Hello Can Van Quyen,

Below is my understanding, does it make sense?

NOR Zones mapping:

Flash bank 0 IFC_A[1:3] 000 ---> A

Flash bank 0 IFC_A[1:3] 001 ---> E

Flash bank 0 IFC_A[1:3] 010 ---> C

Flash bank 0 IFC_A[1:3] 011 ---> G

Flash bank 1 IFC_A[1:3] 100 ---> B

Flash bank 1 IFC_A[1:3] 101 ---> F

Flash bank 1 IFC_A[1:3] 110 ---> D

Flash bank 1 IFC_A[1:3] 111 ---> H

And the one more column in your red circle means this NOR Zones are swapped with the Zones specified in the right column next to it, with the corresponding VBANK BRDCFG0[LBMAP(1:3)], resulted from the IFC_A[1:3] toggled.

For example, NOR Zones C in the left red circle column, with the value of cfg_lbmap[1:3] to be "001", driven into triple XOR logic, it toggles the MSBs of the NOR address to be "011", which is NOR Zones G:

NOR Zones C ---> IFC_A[1:3] 010

010 ⊕ 001 = 011

IFC_A[1:3] 011 ---> NOR Zones G

The VBank detail logic, including the X3 XOR gates:

pastedImage_0.png

How do you think?


Have a great day,
Lunmin

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1,531 次查看
canvanquyen
Contributor III

Dear Lunmin, Pravel,

Thank you for your support.

After read your comment, I got your point.

Once again, Thank you very much :smileyhappy:

Leo.

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1,532 次查看
lunminliang
NXP Employee
NXP Employee

Hello Can Van Quyen,

Below is my understanding, does it make sense?

NOR Zones mapping:

Flash bank 0 IFC_A[1:3] 000 ---> A

Flash bank 0 IFC_A[1:3] 001 ---> E

Flash bank 0 IFC_A[1:3] 010 ---> C

Flash bank 0 IFC_A[1:3] 011 ---> G

Flash bank 1 IFC_A[1:3] 100 ---> B

Flash bank 1 IFC_A[1:3] 101 ---> F

Flash bank 1 IFC_A[1:3] 110 ---> D

Flash bank 1 IFC_A[1:3] 111 ---> H

And the one more column in your red circle means this NOR Zones are swapped with the Zones specified in the right column next to it, with the corresponding VBANK BRDCFG0[LBMAP(1:3)], resulted from the IFC_A[1:3] toggled.

For example, NOR Zones C in the left red circle column, with the value of cfg_lbmap[1:3] to be "001", driven into triple XOR logic, it toggles the MSBs of the NOR address to be "011", which is NOR Zones G:

NOR Zones C ---> IFC_A[1:3] 010

010 ⊕ 001 = 011

IFC_A[1:3] 011 ---> NOR Zones G

The VBank detail logic, including the X3 XOR gates:

pastedImage_0.png

How do you think?


Have a great day,
Lunmin

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

1,531 次查看
LPP
NXP Employee
NXP Employee

The column "NOR Zones" represents logical banks as they are seen by the processor (128MB divided into eight logical banks). The other eight columns denotes A..H letters for ROM physical banks as if  the address is not muxed by the CPLD.

Indeed it might be misleading since the similar letter is used for logical and physical banks. I think, it would be more readable to name zones (first column) as NOR Zone [0..7] and use letters [A..H] for physical banks.


Have a great day,
Pavel

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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