Hello,
I'm trying to implement a RAM memory test based on memtester sources.
I need to directly access RAM locations, without the intervention of the cache, but by analyzing memtester sources I can't find any kind of mechanism to prevent cache utilization.
Is the cache flush, after each write/read operation sufficient to force access to RAM?
Or should I completely disable Dcahing? (in this case How can I proceed?).
I attach some memtester source files. It could help to find how they avoid memory caching.
B.R.
Original Attachment has been moved to: tests.c.zip
Original Attachment has been moved to: memtester.c.zip
Original Attachment has been moved to: memtester.h.zip
Original Attachment has been moved to: tests.h.zip
