Put the initial boot code in the portion of flash that is mapped, then once DDR is initialized, copy code to it. Once running from DDR, you can reconfigure the LAW. See the U-Boot source for an example of this.
Alternatively, you could try running the code with instruction cache enabled, ensuring you don't cross a cacheline boundary while the LAW is in an invalid state, and that no cache line fetches occur to unmapped regions (not even speculatively). The latter could possibly be achieved by doing the LAW change (including readback to sync) and an rfi to the new location all in one cacheline at the end of a page/block with the address of the next cacheline being unmapped or non-executable in the MMU. But this is just an untested possibility -- using DDR is simpler (assuming you're enabling it anyway) and safer.
