u-boot can't boot successfully on uncustom P2020RDB-PC

[敏赵]

Hello there,

We are designing a product using p2020 cpu referring to the design of p2020rdb-pc board. But we use 4GB . My u-boot

verison is 2013-10. We want to config DDR by SPD.

So we modify the configurations of DDR in ddr.c and ddr3_dimm_params.c based on DDR datasheet.

But our u-boot hangs at DDR, the print message as followed:

*********************************************************************

U-Boot 2013.10 (Jul 05 2014 - 18:09:23)

CPU0:  P2020E, Version: 2.1, (0x80ea0021)

Core:  e500, Version: 5.1, (0x80211051)

Clock Configuration:

       CPU0:1200 MHz, CPU1:1200 MHz,

       CCB:600  MHz,

       DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:37.500 MHz

L1:    D-cache 32 KiB enabled

       I-cache 32 KiB enabled

Board: P2020RDB-PCA CPLD: V4.1 PCBA: V4.0

rom_loc: nor upper bank

SD/MMC : 4-bit Mode

eSPI : Enabled

I2C:   ready

SPI:   ready

DRAM:  DIMM 0: is not a DDR3 SPD.

SPD error on controller 0! Trying fallback to raw timing calculation

Detected UDIMM Fixed DDR on board

2 GiB left unmapped

4 GiB (DDR3, 64-bit, CL=6, ECC off)

**********************************************************************

Can we config DDR by this way? Then which other files in

uboot should I modify that can make my DDR3 work?

Thanks a lot.

Best regards,

Min Zhao

[catalindemergia]

Hello,

u-boot can take the DDR parameters from the SPD or from the code.

The error messages that you encountered

- DRAM:  DIMM 0: is not a DDR3 SPD.

- SPD error on controller 0! Trying fallback to raw timing calculation

are validations that u-boot code has for the SPD verification. For some reason, the information

contained in the SPD EEPROM is not correct. If you decided to write the parameters in the code,

you also have to instruct u-boot not to read the SPD and take the values from the code.

This can be done with the flags CONFIG_DDR_SPD and CONFIG_SPD_EEPROM; I think in your

case you have to undefine those flags. (I assume they are defined now, otherwise you would not see

those error messages). Assuming your DDR parameters are correct in the code, it will boot.

regards,

Catalin

[敏赵]

Do the DDR parameters in the code mean the code in ddr.c? 

Best regards,

Min Zhao

[敏赵]

My uboot print messages show ‘2GB left unmapped’. My DDR's rank is 2.

I have modify the p1_p2_rdb_pc.h as follows:

#define CONFIG_SYS_SDRAM_SIZE_LAW	LAW_SIZE_4G
#define CONFIG_CHIP_SELECTS_PER_CTRL	2

Which other configuration should I modify to assign 4GB to DDR.

What's more how should I modify the tlb.c file?

Best regards,

Min Zhao

[scottwood]

The "2GB left unmapped" message is normal and you cannot get rid of it.  If you map all 4GiB in the TLB, you will not be able to map any I/O.

The message does not mean that only 2GB have been initialized, and it does not mean that only 2GB will be used by the OS that U-Boot launches.  The message does not refer to mapping via LAWs.

[敏赵]

How should I modify the configurations in tlb.c to memory 4GB for DDR?

Did I need to set 2 TLB_ENTRY and assign each BOOKE_PAGE_SZ 2GB, or I need to set 4 TLB_ENTRY and assign each BOOKE_PAGE_SZ 1GB?

Best regards,

Min Zhao

[lunminliang]

HI Min,

As Scott has said, you can NOT map all the 4G for DDR in TLB or you can not map anything else. Because it's the whole space for 32bit PPC. But it does Not mean it's not capable of 36bit physical addressing, the TLB mappings are for U-Boot’s use only; Linux reprograms the MMU after it takes over the processor.

[敏赵]

I'm a little confused about what you have said. Do you mean I should map 2GB for DDR in p1_p2_rdb-pc. And I also need map 2GB in tcl.c? Then how should I achieve a 4GB DDR?

Best regards,

Min Zhao

[lunminliang]

See the description from AN4064:

U-Boot is only able to access as much memory as it has effective address space allocated for memory, but it sets things up correctly so that Linux may make use of larger amounts of memory once it begins to use paging.