p1012 HDLC

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

p1012 HDLC

458件の閲覧回数
guxg
Contributor I

In “QUICC Engine BlockReference Manual with Protocol Interworking ” I found

the ratio between the HDLC interface serial clock frequency and the QUICC Engine clock frequency should be at least 1:14. but in the “P1021 QorIQ Integrated Processor Reference Manual"  I found   the ratio between the HDLC interface serial clock frequency and the QUICC Engine clock frequency should be at least 1:3.

In our P1012 platform, the QE frequency is 400MHz,if I use the External Clock,How to set the frequency of  external clock for HDLC?

thanks!!!

ラベル(1)
0 件の賞賛
1 返信

319件の閲覧回数
alexander_yakov
NXP Employee
NXP Employee

Factory engineer confirmed the number 1:3 is correct.

I will notify documentation team to make appropriate changes in QE Reference Manual, thank you for pointing!


Have a great day,
Alexander

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 件の賞賛